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| author | Thinh Nguyen <Thinh.Nguyen@synopsys.com> | 2018-03-16 15:34:07 -0700 |
|---|---|---|
| committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2018-03-22 10:48:51 +0200 |
| commit | 2fbc5bdc8fd1afa6d47223f6a4251f04c7d8fe7c (patch) | |
| tree | 1399e8ec221878e7b58703b601d28b1e03a6720f /drivers/hwspinlock/u8500_hsem.c | |
| parent | d548a61767fad7a0e6d89b118daeed2f5b8a8c2f (diff) | |
usb: dwc3: Add DWC_usb31 GRXTHRCFG bit fields
Add new GRXTHRCFG bit field macros for DWC_usb31. The GRXTHRCFG register
fields for DWC_usb31 is as follows:
+-------+--------------------------+----------------------------------+
| BITS | Name | Description |
+=======+==========================+==================================+
| 31:27 | reserved | |
| 26 | UsbRxPktCntSel | Async ESS receive packet |
| | | threshold enable |
| 25:21 | UsbRxPktCnt | Async ESS receive packet |
| | | threshold count |
| 20:16 | UsbMaxRxBurstSize | Async ESS Max receive burst size |
| 15 | UsbRxThrNumPktSel_HS_Prd | HS high bandwidth periodic |
| | | receive packet threshold enable |
| 14:13 | UsbRxThrNumPkt_HS_Prd | HS high bandwidth periodic |
| | | receive packet threshold count |
| 12:11 | reserved | |
| 10 | UsbRxThrNumPktSel_Prd | Periodic ESS receive packet |
| | | threshold enable |
| 9:5 | UsbRxThrNumPkt_Prd | Periodic ESS receive packet |
| | | threshold count |
| 4:0 | UsbMaxRxBurstSize_Prd | Max periodic ESS RX burst size |
+-------+--------------------------+----------------------------------+
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/hwspinlock/u8500_hsem.c')
0 files changed, 0 insertions, 0 deletions