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authorAlexander Shishkin <alexander.shishkin@linux.intel.com>2019-05-03 11:44:40 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-05-03 18:14:30 +0200
commit7b7036d47c356a40818e516a69ac81a5dcc1613f (patch)
tree636c5602becf6d0a6c3e6b4f9d63049ffcfab63d /drivers/hwtracing/intel_th/intel_th.h
parent62a593022c32380d040303a5e3d6b67fd9c415bc (diff)
intel_th: pci: Use MSI interrupt signalling
Since Intel TH is capable of MSI interrupt signalling, make use of it. The way it works is, each of the 7 interrupt triggering events has its own vector in this mode, as opposed to interrupt line delivery, where all events are signalled via the same line. Failing to enable MSI, the driver falls back to using an interrupt line. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/intel_th/intel_th.h')
-rw-r--r--drivers/hwtracing/intel_th/intel_th.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/hwtracing/intel_th/intel_th.h b/drivers/hwtracing/intel_th/intel_th.h
index 6c6eb87e48a0..db3ad8ca1c48 100644
--- a/drivers/hwtracing/intel_th/intel_th.h
+++ b/drivers/hwtracing/intel_th/intel_th.h
@@ -238,6 +238,9 @@ enum th_mmio_idx {
#define TH_CONFIGURABLE_MASTERS 256
#define TH_MSC_MAX 2
+/* Maximum IRQ vectors */
+#define TH_NVEC_MAX 8
+
/**
* struct intel_th - Intel TH controller
* @dev: driver core's device