diff options
| author | Eugen Hristev <eugen.hristev@microchip.com> | 2019-12-09 10:20:02 +0000 |
|---|---|---|
| committer | Wolfram Sang <wsa@the-dreams.de> | 2020-01-06 15:31:26 +0100 |
| commit | b7169a57982383a81d4227712c894e6ec2516e8c (patch) | |
| tree | 22060eee98b66b902181dc12fd9ecb7d30acab12 /drivers/i2c/busses/i2c-at91-core.c | |
| parent | c79f46a282390e0f5b306007bf7b11a46d529538 (diff) | |
i2c: at91: fix clk_offset for sam9x60
In SAM9X60 datasheet, FLEX_TWI_CWGR register description mentions clock
offset of 3 cycles (compared to 4 in eg. SAMA5D3).
This is the same offset as in SAMA5D2.
Fixes: b00277923743 ("i2c: at91: add new platform support for sam9x60")
Suggested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Reviewed-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c/busses/i2c-at91-core.c')
| -rw-r--r-- | drivers/i2c/busses/i2c-at91-core.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/i2c/busses/i2c-at91-core.c b/drivers/i2c/busses/i2c-at91-core.c index e13af4874976..5137e6297022 100644 --- a/drivers/i2c/busses/i2c-at91-core.c +++ b/drivers/i2c/busses/i2c-at91-core.c @@ -174,7 +174,7 @@ static struct at91_twi_pdata sama5d2_config = { static struct at91_twi_pdata sam9x60_config = { .clk_max_div = 7, - .clk_offset = 4, + .clk_offset = 3, .has_unre_flag = true, .has_alt_cmd = true, .has_hold_field = true, |