Merge branch 'i2c/for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c updates from Wolfram Sang:

 - the first series of making i2c_device_id optional instead of
   mandatory (in favor of alternatives like of_device_id).

   This involves adding a new probe callback (probe_new) which removes
   some peculiarities I2C had for a long time now. The new probe is
   matching the other subsystems now and the old one will be removed
   once all users are converted. It is expected to take a while but
   there is ongoing interest in that.

 - SMBus Host Notify introduced 4.9 got refactored. They are now using
   interrupts instead of the alert callback which solves multiple
   issues.

 - new drivers for iMX LowPower I2C, Mellanox CPLD and its I2C mux

 - significant refactoring for bcm2835 driver

 - the usual set of driver updates and improvements

* 'i2c/for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (46 commits)
  i2c: fsl-lpi2c: read lpi2c fifo size in probe()
  i2c: octeon: thunderx: Remove double-check after interrupt
  i2c: octeon: thunderx: TWSI software reset in recovery
  i2c: cadence: Allow Cadence I2C to be selected for Cadence Xtensa CPUs
  i2c: sh_mobile: Add per-Generation fallback bindings
  i2c: rcar: Add per-Generation fallback bindings
  i2c: imx-lpi2c: add low power i2c bus driver
  dt-bindings: i2c: imx-lpi2c: add devicetree bindings
  i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield
  i2c: pxa: Add support for the I2C units found in Armada 3700
  i2c: pxa: Add definition of fast and high speed modes via the regs layout
  dt-bindings: i2c: pxa: Update the documentation for the Armada 3700
  i2c: qup: support SMBus block read
  i2c: qup: add ACPI support
  i2c: designware: Consolidate default functionality bits
  i2c: i2c-mux-gpio: update mux with gpiod_set_array_value_cansleep
  i2c: mux: pca954x: Add ACPI support for pca954x
  i2c: use an IRQ to report Host Notify events, not alert
  i2c: i801: remove SMBNTFDDAT reads as they always seem to return 0
  i2c: i801: use the BIT() macro for FEATURES_* also
  ...

1 files changed, 5 insertions, 41 deletions

diff --git a/drivers/i2c/busses/i2c-octeon-core.c b/drivers/i2c/busses/i2c-octeon-core.c
index 5e63b17f935d..3d10f1a802be 100644
--- a/drivers/i2c/busses/i2c-octeon-core.c
+++ b/drivers/i2c/busses/i2c-octeon-core.c
@@ -36,24 +36,6 @@ static bool octeon_i2c_test_iflg(struct octeon_i2c *i2c)
 	return (octeon_i2c_ctl_read(i2c) & TWSI_CTL_IFLG);
 }
 
-static bool octeon_i2c_test_ready(struct octeon_i2c *i2c, bool *first)
-{
-	if (octeon_i2c_test_iflg(i2c))
-		return true;
-
-	if (*first) {
-		*first = false;
-		return false;
-	}
-
-	/*
-	 * IRQ has signaled an event but IFLG hasn't changed.
-	 * Sleep and retry once.
-	 */
-	usleep_range(I2C_OCTEON_EVENT_WAIT, 2 * I2C_OCTEON_EVENT_WAIT);
-	return octeon_i2c_test_iflg(i2c);
-}
-
 /**
  * octeon_i2c_wait - wait for the IFLG to be set
  * @i2c: The struct octeon_i2c
@@ -63,7 +45,6 @@ static bool octeon_i2c_test_ready(struct octeon_i2c *i2c, bool *first)
 static int octeon_i2c_wait(struct octeon_i2c *i2c)
 {
 	long time_left;
-	bool first = true;
 
 	/*
 	 * Some chip revisions don't assert the irq in the interrupt
@@ -80,7 +61,7 @@ static int octeon_i2c_wait(struct octeon_i2c *i2c)
 	}
 
 	i2c->int_enable(i2c);
-	time_left = wait_event_timeout(i2c->queue, octeon_i2c_test_ready(i2c, &first),
+	time_left = wait_event_timeout(i2c->queue, octeon_i2c_test_iflg(i2c),
 				       i2c->adap.timeout);
 	i2c->int_disable(i2c);
 
@@ -102,25 +83,6 @@ static bool octeon_i2c_hlc_test_valid(struct octeon_i2c *i2c)
 	return (__raw_readq(i2c->twsi_base + SW_TWSI(i2c)) & SW_TWSI_V) == 0;
 }
 
-static bool octeon_i2c_hlc_test_ready(struct octeon_i2c *i2c, bool *first)
-{
-	/* check if valid bit is cleared */
-	if (octeon_i2c_hlc_test_valid(i2c))
-		return true;
-
-	if (*first) {
-		*first = false;
-		return false;
-	}
-
-	/*
-	 * IRQ has signaled an event but valid bit isn't cleared.
-	 * Sleep and retry once.
-	 */
-	usleep_range(I2C_OCTEON_EVENT_WAIT, 2 * I2C_OCTEON_EVENT_WAIT);
-	return octeon_i2c_hlc_test_valid(i2c);
-}
-
 static void octeon_i2c_hlc_int_clear(struct octeon_i2c *i2c)
 {
 	/* clear ST/TS events, listen for neither */
@@ -176,7 +138,6 @@ static void octeon_i2c_hlc_disable(struct octeon_i2c *i2c)
  */
 static int octeon_i2c_hlc_wait(struct octeon_i2c *i2c)
 {
-	bool first = true;
 	int time_left;
 
 	/*
@@ -195,7 +156,7 @@ static int octeon_i2c_hlc_wait(struct octeon_i2c *i2c)
 
 	i2c->hlc_int_enable(i2c);
 	time_left = wait_event_timeout(i2c->queue,
-				       octeon_i2c_hlc_test_ready(i2c, &first),
+				       octeon_i2c_hlc_test_valid(i2c),
 				       i2c->adap.timeout);
 	i2c->hlc_int_disable(i2c);
 	if (!time_left)
@@ -789,6 +750,9 @@ static void octeon_i2c_prepare_recovery(struct i2c_adapter *adap)
 	struct octeon_i2c *i2c = i2c_get_adapdata(adap);
 
 	octeon_i2c_hlc_disable(i2c);
+	octeon_i2c_reg_write(i2c, SW_TWSI_EOP_TWSI_RST, 0);
+	/* wait for software reset to settle */
+	udelay(5);
 
 	/*
 	 * Bring control register to a good state regardless