diff options
| author | Wenpeng Liang <liangwenpeng@huawei.com> | 2021-04-02 17:07:29 +0800 |
|---|---|---|
| committer | Jason Gunthorpe <jgg@nvidia.com> | 2021-04-08 16:08:21 -0300 |
| commit | 2371efab9794bdf845b03473858a90d65035e331 (patch) | |
| tree | 783aea656cf759118e38305714bde56ab7039718 /drivers/infiniband/hw/hns/hns_roce_hw_v2.h | |
| parent | 714a597baab099e728307768e3b5c3b82d7b2ce3 (diff) | |
RDMA/hns: Delete redundant abnormal interrupt status
The hardware supports only two types of abnormal interrupts.
Fixes: a5073d6054f7 ("RDMA/hns: Add eq support of hip08")
Link: https://lore.kernel.org/r/1617354454-47840-5-git-send-email-liweihang@huawei.com
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'drivers/infiniband/hw/hns/hns_roce_hw_v2.h')
| -rw-r--r-- | drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h index 3ad3f5146343..826f3d3fdc14 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h @@ -1966,8 +1966,7 @@ struct hns_roce_dip { #define HNS_ROCE_V2_ASYNC_EQE_NUM 0x1000 #define HNS_ROCE_V2_VF_INT_ST_AEQ_OVERFLOW_S 0 -#define HNS_ROCE_V2_VF_INT_ST_BUS_ERR_S 1 -#define HNS_ROCE_V2_VF_INT_ST_OTHER_ERR_S 2 +#define HNS_ROCE_V2_VF_INT_ST_RAS_INT_S 1 #define HNS_ROCE_EQ_DB_CMD_AEQ 0x0 #define HNS_ROCE_EQ_DB_CMD_AEQ_ARMED 0x1 |