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authorNoam Camus <noamc@ezchip.com>2015-10-29 00:26:22 +0200
committerVineet Gupta <vgupta@synopsys.com>2016-05-09 09:32:31 +0530
commit44df427c894a4357e43bb35769baefa7cdf09833 (patch)
treead57bf395fabcb5d12a25c7bd64cf0561d92a39a /drivers/irqchip/Makefile
parenta53224577e317d010f61aa1b1b8b18f2b168a137 (diff)
irqchip: add nps Internal and external irqchips
Adding EZchip NPS400 support. Internal interrupts are handled by Multi Thread Manager (MTM) Once interrupt is serviced MTM is acked for deactivating the interrupt. External interrupts are handled by MTM as well as at Global Interrupt Controller (GIC) e.g. serial and network devices. Signed-off-by: Noam Camus <noamc@ezchip.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/irqchip/Makefile')
-rw-r--r--drivers/irqchip/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index b03cfcbbac6b..9d54d53fe223 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -65,3 +65,4 @@ obj-$(CONFIG_INGENIC_IRQ) += irq-ingenic.o
obj-$(CONFIG_IMX_GPCV2) += irq-imx-gpcv2.o
obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o
obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o
+obj-$(CONFIG_EZNPS_GIC) += irq-eznps.o