diff options
| author | Daniel Scheller <d.scheller@gmx.net> | 2017-04-09 16:38:25 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@s-opensource.com> | 2017-06-20 09:57:30 -0300 |
| commit | 1b58a5a4b5fea0be8ae625a945f9662af2edf9a5 (patch) | |
| tree | 8219c5f9e4da10caacdcbb8f9e02bf66263d50cc /drivers/media/pci/ddbridge/ddbridge-core.c | |
| parent | df61f828d4e5f6db7936a21afeef1d5cb6248b4b (diff) | |
[media] ddbridge: board control setup, ts quirk flags
This is a backport of the board control setup from the vendor provided
dddvb driver package, which does additional device initialisation based
on the board_control device info values. Also backports the TS quirk
flags which is used to control setup and usage of the tuner modules
soldered on the bridge cards (e.g. CineCTv7, CineS2 V7, MaxA8 and the
likes).
Functionality originates from ddbridge vendor driver. Permission for
reuse and kernel inclusion was formally granted by Ralph Metzler
<rjkm@metzlerbros.de>.
Cc: Ralph Metzler <rjkm@metzlerbros.de>
Signed-off-by: Daniel Scheller <d.scheller@gmx.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat (limited to 'drivers/media/pci/ddbridge/ddbridge-core.c')
| -rw-r--r-- | drivers/media/pci/ddbridge/ddbridge-core.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/media/pci/ddbridge/ddbridge-core.c b/drivers/media/pci/ddbridge/ddbridge-core.c index f0cf9cde99e3..fef9932d071c 100644 --- a/drivers/media/pci/ddbridge/ddbridge-core.c +++ b/drivers/media/pci/ddbridge/ddbridge-core.c @@ -1764,6 +1764,19 @@ static int ddb_probe(struct pci_dev *pdev, const struct pci_device_id *id) ddbwritel(0xfff0f, INTERRUPT_ENABLE); ddbwritel(0, MSI1_ENABLE); + /* board control */ + if (dev->info->board_control) { + ddbwritel(0, DDB_LINK_TAG(0) | BOARD_CONTROL); + msleep(100); + ddbwritel(dev->info->board_control_2, + DDB_LINK_TAG(0) | BOARD_CONTROL); + usleep_range(2000, 3000); + ddbwritel(dev->info->board_control_2 + | dev->info->board_control, + DDB_LINK_TAG(0) | BOARD_CONTROL); + usleep_range(2000, 3000); + } + if (ddb_i2c_init(dev) < 0) goto fail1; ddb_ports_init(dev); |