diff options
| author | Hans Verkuil <hans.verkuil@cisco.com> | 2013-03-04 07:18:38 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-03-19 16:16:04 -0300 |
| commit | 1de1951930d4450d1645a0a907b710f268af42c3 (patch) | |
| tree | fafa302bede6d683050882b14ad3c48766ede5c1 /drivers/media/platform/davinci/dm644x_ccdc_regs.h | |
| parent | b12aed0ec518eb348ae0f6d196fd726c57670823 (diff) | |
[media] davinci/dm644x_ccdc: fix compiler warning
drivers/media/platform/davinci/dm644x_ccdc.c: In function ‘validate_ccdc_param’:
drivers/media/platform/davinci/dm644x_ccdc.c:233:32: warning: comparison between ‘enum ccdc_gama_width’ and ‘enum ccdc_data_size’ [-Wenum-compare]
It took a bit of work, see this thread of an earlier attempt to fix this:
https://patchwork.kernel.org/patch/1923091/
I've chosen not to follow the suggestions in that thread since gamma_width is
really a different property from data_size. What you really want is to know if
gamma_width fits inside data_size and for that you need to translate each
enum into a maximum bit number so you can safely compare the two.
So I put in two static inline translation functions instead, keeping the rest
of the code the same (except for fixing the 'gama' typo).
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Acked-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/platform/davinci/dm644x_ccdc_regs.h')
| -rw-r--r-- | drivers/media/platform/davinci/dm644x_ccdc_regs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/media/platform/davinci/dm644x_ccdc_regs.h b/drivers/media/platform/davinci/dm644x_ccdc_regs.h index 90370e414e2c..2b0aca5383f0 100644 --- a/drivers/media/platform/davinci/dm644x_ccdc_regs.h +++ b/drivers/media/platform/davinci/dm644x_ccdc_regs.h @@ -84,7 +84,7 @@ #define CCDC_VDHDEN_ENABLE (1 << 16) #define CCDC_LPF_ENABLE (1 << 14) #define CCDC_ALAW_ENABLE (1 << 3) -#define CCDC_ALAW_GAMA_WD_MASK 7 +#define CCDC_ALAW_GAMMA_WD_MASK 7 #define CCDC_BLK_CLAMP_ENABLE (1 << 31) #define CCDC_BLK_SGAIN_MASK 0x1F #define CCDC_BLK_ST_PXL_MASK 0x7FFF |