diff options
| author | Dmitry Osipenko <digetx@gmail.com> | 2018-04-09 22:28:31 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2018-04-30 10:10:00 +0200 |
| commit | a8d502fd33484ed8c4acc6acae73918844ca6811 (patch) | |
| tree | c25a45b7d295e76825ccf602c41eebf7865cea9f /drivers/memory/tegra/mc.h | |
| parent | 85dce8918f90f71fc86ae822dd8cf4b738274f7e (diff) | |
memory: tegra: Squash tegra20-mc into common tegra-mc driver
Tegra30+ has some minor differences in registers / bits layout compared
to Tegra20. Let's squash Tegra20 driver into the common tegra-mc driver
in a preparation for the upcoming MC hot reset controls implementation,
avoiding code duplication.
Note that this currently doesn't report the value of MC_GART_ERROR_REQ
because it is located within the GART register area and cannot be safely
accessed from the MC driver (this happens to work only by accident). The
proper solution is to integrate the GART driver with the MC driver, much
like is done for the Tegra SMMU, but that is an invasive change and will
be part of a separate patch series.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/memory/tegra/mc.h')
| -rw-r--r-- | drivers/memory/tegra/mc.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h index 24e020b4609b..cdd6911f4079 100644 --- a/drivers/memory/tegra/mc.h +++ b/drivers/memory/tegra/mc.h @@ -21,19 +21,30 @@ #define MC_INT_INVALID_SMMU_PAGE (1 << 10) #define MC_INT_ARBITRATION_EMEM (1 << 9) #define MC_INT_SECURITY_VIOLATION (1 << 8) +#define MC_INT_INVALID_GART_PAGE (1 << 7) #define MC_INT_DECERR_EMEM (1 << 6) static inline u32 mc_readl(struct tegra_mc *mc, unsigned long offset) { + if (mc->regs2 && offset >= 0x24) + return readl(mc->regs2 + offset - 0x3c); + return readl(mc->regs + offset); } static inline void mc_writel(struct tegra_mc *mc, u32 value, unsigned long offset) { + if (mc->regs2 && offset >= 0x24) + return writel(value, mc->regs2 + offset - 0x3c); + writel(value, mc->regs + offset); } +#ifdef CONFIG_ARCH_TEGRA_2x_SOC +extern const struct tegra_mc_soc tegra20_mc_soc; +#endif + #ifdef CONFIG_ARCH_TEGRA_3x_SOC extern const struct tegra_mc_soc tegra30_mc_soc; #endif |