summaryrefslogtreecommitdiff
path: root/drivers/memory/tegra/tegra30.c
diff options
context:
space:
mode:
authorPaul Walmsley <paul@pwsan.com>2015-06-04 19:33:48 +0000
committerThierry Reding <treding@nvidia.com>2015-08-13 16:07:52 +0200
commit3c01cf3befa66cc21f06672685cf59a53056887a (patch)
tree0dc2664bc3b5851928b2e4eef74e9214820015e7 /drivers/memory/tegra/tegra30.c
parent30a636f984984655ad5350e73a6a3141c9ba85ae (diff)
memory: tegra: Add support for a variable-size client ID bitfield
Recent versions of the Tegra MC hardware extend the size of the client ID bitfield in the MC_ERR_STATUS register by one bit. While one could simply extend the bitfield for older hardware, that would allow data from reserved bits into the driver code, which is generally a bad idea on principle. So this patch instead passes in the client ID mask from from the per-SoC MC data. There's no MC support for T210 (yet), but when that support winds up in the kernel, the appropriate soc->client_id_mask value for that chip will be 0xff. Based on an original patch by David Ung <davidu@nvidia.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: David Ung <davidu@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/memory/tegra/tegra30.c')
-rw-r--r--drivers/memory/tegra/tegra30.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/memory/tegra/tegra30.c b/drivers/memory/tegra/tegra30.c
index 1abcd8f6f3ba..52e16c7b34f8 100644
--- a/drivers/memory/tegra/tegra30.c
+++ b/drivers/memory/tegra/tegra30.c
@@ -966,5 +966,6 @@ const struct tegra_mc_soc tegra30_mc_soc = {
.num_clients = ARRAY_SIZE(tegra30_mc_clients),
.num_address_bits = 32,
.atom_size = 16,
+ .client_id_mask = 0x7f,
.smmu = &tegra30_smmu_soc,
};