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authorLinus Torvalds <torvalds@linux-foundation.org>2023-11-01 15:28:33 -1000
committerLinus Torvalds <torvalds@linux-foundation.org>2023-11-01 15:28:33 -1000
commit1e0c505e13162a2abe7c984309cfe2ae976b428d (patch)
tree1a67ca0d219e3990e8290ca33af91323d59e31e2 /drivers/misc/sgi-gru/gru_instructions.h
parent4684e928dbee00d625b5102ea23c216cc2d85f46 (diff)
parent550087a0ba91eb001c139f563a193b1e9ef5a8dd (diff)
Merge tag 'asm-generic-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic
Pull ia64 removal and asm-generic updates from Arnd Bergmann: - The ia64 architecture gets its well-earned retirement as planned, now that there is one last (mostly) working release that will be maintained as an LTS kernel. - The architecture specific system call tables are updated for the added map_shadow_stack() syscall and to remove references to the long-gone sys_lookup_dcookie() syscall. * tag 'asm-generic-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: hexagon: Remove unusable symbols from the ptrace.h uapi asm-generic: Fix spelling of architecture arch: Reserve map_shadow_stack() syscall number for all architectures syscalls: Cleanup references to sys_lookup_dcookie() Documentation: Drop or replace remaining mentions of IA64 lib/raid6: Drop IA64 support Documentation: Drop IA64 from feature descriptions kernel: Drop IA64 support from sig_fault handlers arch: Remove Itanium (IA-64) architecture
Diffstat (limited to 'drivers/misc/sgi-gru/gru_instructions.h')
-rw-r--r--drivers/misc/sgi-gru/gru_instructions.h12
1 files changed, 1 insertions, 11 deletions
diff --git a/drivers/misc/sgi-gru/gru_instructions.h b/drivers/misc/sgi-gru/gru_instructions.h
index 04d5170ac149..da5eb9edf9ec 100644
--- a/drivers/misc/sgi-gru/gru_instructions.h
+++ b/drivers/misc/sgi-gru/gru_instructions.h
@@ -29,17 +29,7 @@ extern void gru_wait_abort_proc(void *cb);
* Architecture dependent functions
*/
-#if defined(CONFIG_IA64)
-#include <linux/compiler.h>
-#include <asm/intrinsics.h>
-#define __flush_cache(p) ia64_fc((unsigned long)p)
-/* Use volatile on IA64 to ensure ordering via st4.rel */
-#define gru_ordered_store_ulong(p, v) \
- do { \
- barrier(); \
- *((volatile unsigned long *)(p)) = v; /* force st.rel */ \
- } while (0)
-#elif defined(CONFIG_X86_64)
+#if defined(CONFIG_X86_64)
#include <asm/cacheflush.h>
#define __flush_cache(p) clflush(p)
#define gru_ordered_store_ulong(p, v) \