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authorWolfram Sang <wsa+renesas@sang-engineering.com>2018-11-19 14:13:57 +0100
committerUlf Hansson <ulf.hansson@linaro.org>2018-12-17 08:26:24 +0100
commit1970701f808095d28289c4add99a81be4ddd3790 (patch)
tree2ca7b954bdb4baa3d7561425779d8c82e4534c31 /drivers/mmc/host
parent0f4e2054c971c827dc9463ff14c7f8f90972eb52 (diff)
mmc: tmio: introduce mask for 'always 1' bits
Some variants (namely Renesas SDHI) have bits in the STATS and IRQ_MASK registers which are 'always 1' and should be written as such. Introduce a seperate mask for this and apply it whenever such a register is written. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host')
-rw-r--r--drivers/mmc/host/renesas_sdhi_core.c1
-rw-r--r--drivers/mmc/host/tmio_mmc.h5
2 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index a049b01206f1..31a351a20dc0 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -722,6 +722,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
host->ops.card_busy = renesas_sdhi_card_busy;
host->ops.start_signal_voltage_switch =
renesas_sdhi_start_signal_voltage_switch;
+ host->sdcard_irq_setbit_mask = TMIO_STAT_ALWAYS_SET_27;
}
/* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 5f6dfb86e43e..c03529e3f01a 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -70,6 +70,7 @@
#define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */
#define TMIO_STAT_RXRDY BIT(24)
#define TMIO_STAT_TXRQ BIT(25)
+#define TMIO_STAT_ALWAYS_SET_27 BIT(27) /* only known on R-Car 2+ so far */
#define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
#define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
#define TMIO_STAT_CMD_BUSY BIT(30)
@@ -154,6 +155,7 @@ struct tmio_mmc_host {
u32 sdcard_irq_mask;
u32 sdio_irq_mask;
unsigned int clk_cache;
+ u32 sdcard_irq_setbit_mask;
spinlock_t lock; /* protect host private data */
unsigned long last_req_ts;
@@ -268,6 +270,9 @@ static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host,
int addr, u32 val)
{
+ if (addr == CTL_IRQ_MASK || addr == CTL_STATUS)
+ val |= host->sdcard_irq_setbit_mask;
+
iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift));
iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
}