diff options
| author | Chuanhong Guo <gch981213@gmail.com> | 2022-03-20 18:00:01 +0800 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2022-04-04 10:34:56 +0200 |
| commit | 54647cd003c08b714474a5b599a147ec6a160486 (patch) | |
| tree | c50c8d2f4273e1a8ab4493fb1b0b59cfc4d76a80 /drivers/mtd/nand/raw/nand_base.c | |
| parent | 194ec04b3a9e7fa97d1fbef296410631bc3cf1c8 (diff) | |
mtd: spinand: gigadevice: add support for GD5FxGM7xExxG
Add support for:
GD5F{1,2}GM7{U,R}ExxG
GD5F4GM8{U,R}ExxG
These are new 27nm counterparts for the GD5FxGQ4 chips from GigaDevice
with 8b/512b on-die ECC capability.
These chips (and currently supported GD5FxGQ5 chips) have QIO DTR
instruction for reading page cache. It isn't added in this patch because
I don't have a DTR spi controller for testing.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220320100001.247905-6-gch981213@gmail.com
Diffstat (limited to 'drivers/mtd/nand/raw/nand_base.c')
0 files changed, 0 insertions, 0 deletions