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authorIgor Russkikh <igor.russkikh@aquantia.com>2018-01-19 17:03:19 +0300
committerDavid S. Miller <davem@davemloft.net>2018-01-21 18:19:03 -0500
commit4948293ff963e5451a8f0c21be8f1dfc2c7f65f5 (patch)
treef763d3372d5b6467f4cb5d0df777a19e0fe17f0c /drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h
parentefe779b749cc9da0f36a01fba38c98864e6b8748 (diff)
net: aquantia: Introduce new AQC devices and capabilities
A number of new AQC devices is going to be released. To support more flexible capabilities management a number of static caps instances is now declared. Devices now are mainly differs by supported speeds, but in future more parameters will be customized. A set of AQC100 devices have fibre media, not twisted pair - this is also reflected in new capabilities definitions. HW level also now directly exports hw_ops for each of A0/B0 hardware. PCI configuration now uses a device configuration table where each device ID is explicitly mapped with hardware OPs and capabilities structures. Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h')
-rw-r--r--drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h23
1 files changed, 22 insertions, 1 deletions
diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h
index 099799333eaa..2cc8dacfdc27 100644
--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h
+++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h
@@ -16,6 +16,27 @@
#include "../aq_common.h"
-const struct aq_hw_ops *hw_atl_b0_get_ops_by_id(struct pci_dev *pdev);
+extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc100;
+extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc107;
+extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc108;
+extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc109;
+
+#define hw_atl_b0_caps_aqc111 hw_atl_b0_caps_aqc108
+#define hw_atl_b0_caps_aqc112 hw_atl_b0_caps_aqc109
+
+#define hw_atl_b0_caps_aqc100s hw_atl_b0_caps_aqc100
+#define hw_atl_b0_caps_aqc107s hw_atl_b0_caps_aqc107
+#define hw_atl_b0_caps_aqc108s hw_atl_b0_caps_aqc108
+#define hw_atl_b0_caps_aqc109s hw_atl_b0_caps_aqc109
+
+#define hw_atl_b0_caps_aqc111s hw_atl_b0_caps_aqc108
+#define hw_atl_b0_caps_aqc112s hw_atl_b0_caps_aqc109
+
+#define hw_atl_b0_caps_aqc111e hw_atl_b0_caps_aqc108
+#define hw_atl_b0_caps_aqc112e hw_atl_b0_caps_aqc109
+
+extern const struct aq_hw_ops hw_atl_ops_b0;
+
+#define hw_atl_ops_b1 hw_atl_ops_b0
#endif /* HW_ATL_B0_H */