diff options
| author | Rohit Maheshwari <rohitm@chelsio.com> | 2020-03-07 20:06:05 +0530 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2020-03-08 21:16:23 -0700 |
| commit | 5a4b9fe7fece62ecab6fb28fe92362f83b41c33e (patch) | |
| tree | 2c7d7dae74fe96071650099bb131d92609781cd1 /drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h | |
| parent | 8a30923e1598c050f2670b88d51e3752b52b49ae (diff) | |
cxgb4/chcr: complete record tx handling
Added tx handling in this patch. This includes handling of segments
contain single complete record.
v1->v2:
- chcr_write_cpl_set_tcb_ulp is added in this patch.
v3->v4:
- mss calculation logic.
- replaced kfree_skb with dev_kfree_skb_any.
- corrected error message reported by kbuild test robot <lkp@intel.com>
Signed-off-by: Rohit Maheshwari <rohitm@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h')
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h b/drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h index fc93389148c8..50232e063f49 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h @@ -74,6 +74,16 @@ #define TCB_RTT_TS_RECENT_AGE_M 0xffffffffULL #define TCB_RTT_TS_RECENT_AGE_V(x) ((x) << TCB_RTT_TS_RECENT_AGE_S) +#define TCB_T_RTSEQ_RECENT_W 7 +#define TCB_T_RTSEQ_RECENT_S 0 +#define TCB_T_RTSEQ_RECENT_M 0xffffffffULL +#define TCB_T_RTSEQ_RECENT_V(x) ((x) << TCB_T_RTSEQ_RECENT_S) + +#define TCB_TX_MAX_W 9 +#define TCB_TX_MAX_S 0 +#define TCB_TX_MAX_M 0xffffffffULL +#define TCB_TX_MAX_V(x) ((x) << TCB_TX_MAX_S) + #define TCB_SND_UNA_RAW_W 10 #define TCB_SND_UNA_RAW_S 0 #define TCB_SND_UNA_RAW_M 0xfffffffULL @@ -89,6 +99,16 @@ #define TCB_SND_MAX_RAW_M 0xfffffffULL #define TCB_SND_MAX_RAW_V(x) ((x) << TCB_SND_MAX_RAW_S) +#define TCB_RCV_NXT_W 16 +#define TCB_RCV_NXT_S 10 +#define TCB_RCV_NXT_M 0xffffffffULL +#define TCB_RCV_NXT_V(x) ((x) << TCB_RCV_NXT_S) + +#define TCB_RCV_WND_W 17 +#define TCB_RCV_WND_S 10 +#define TCB_RCV_WND_M 0xffffffULL +#define TCB_RCV_WND_V(x) ((x) << TCB_RCV_WND_S) + #define TCB_RX_FRAG2_PTR_RAW_W 27 #define TCB_RX_FRAG3_LEN_RAW_W 29 #define TCB_RX_FRAG3_START_IDX_OFFSET_RAW_W 30 |