diff options
| author | Hao Lan <lanhao@huawei.com> | 2022-08-30 19:11:16 +0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2022-08-31 14:10:49 +0100 |
| commit | 5c4f72842d1df19337b171fd4677239d2e11d047 (patch) | |
| tree | 8caceb2019e622ef81234e1cbc55c00b327186e2 /drivers/net/ethernet/hisilicon/hns3/hns3_common | |
| parent | eaf83ae59e18a3480afe222daf9537d58165e052 (diff) | |
net: hns3: add querying and setting fec llrs mode from firmware
This patch supports llrs fec mode in speed 200G for some new devices, and
suppoprts querying llrs fec ability from firmware.
Signed-off-by: Hao Lan <lanhao@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/hisilicon/hns3/hns3_common')
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c | 1 | ||||
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c index 701d6373020c..f9bd3fc969c5 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c @@ -91,6 +91,7 @@ int hclge_comm_firmware_compat_config(struct hnae3_ae_dev *ae_dev, hnae3_set_bit(compat, HCLGE_COMM_PHY_IMP_EN_B, 1); hnae3_set_bit(compat, HCLGE_COMM_MAC_STATS_EXT_EN_B, 1); hnae3_set_bit(compat, HCLGE_COMM_SYNC_RX_RING_HEAD_EN_B, 1); + hnae3_set_bit(compat, HCLGE_COMM_LLRS_FEC_EN_B, 1); req->compat = cpu_to_le32(compat); } diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h index dec0b9b422b4..8aaa5fdfa2f6 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h @@ -20,6 +20,7 @@ #define HCLGE_COMM_PHY_IMP_EN_B 2 #define HCLGE_COMM_MAC_STATS_EXT_EN_B 3 #define HCLGE_COMM_SYNC_RX_RING_HEAD_EN_B 4 +#define HCLGE_COMM_LLRS_FEC_EN_B 5 #define hclge_comm_dev_phy_imp_supported(ae_dev) \ test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (ae_dev)->caps) |