diff options
| author | Huazhong Tan <tanhuazhong@huawei.com> | 2021-10-24 17:41:08 +0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-10-25 14:00:58 +0100 |
| commit | c99fead7cb07979f5db38035ccb5f02ad2c7106a (patch) | |
| tree | cb3c37fb7afddb087988d0f834d7325601830c9e /drivers/net/ethernet/hisilicon/hns3/hns3_enet.h | |
| parent | 6047862d5e736b903ab8e9eaffe5649eb4ca0030 (diff) | |
net: hns3: add debugfs support for interrupt coalesce
Since user may need to check the current configuration of the
interrupt coalesce, so add debugfs support for query this info.
Create a single file "coalesce_info" for it, and query it by
"cat coalesce_info", return the result to userspace.
For device whose version is above V3(include V3), the GL's register
contains usecs and 1us unit configuration. When get the usecs
configuration from this register, it will include the confusing unit
configuration, so add a GL mask to get the correct value, and add
a QL mask for the frames configuration as well.
The display style is below:
$ cat coalesce_info
tx interrupt coalesce info:
VEC_ID ALGO_STATE PROFILE_ID CQE_MODE TUNE_STATE STEPS_LEFT...
0 IN_PROG 4 EQE ON_TOP 0...
1 START 3 EQE LEFT 1...
rx interrupt coalesce info:
VEC_ID ALGO_STATE PROFILE_ID CQE_MODE TUNE_STATE STEPS_LEFT...
0 IN_PROG 3 EQE LEFT 1...
1 IN_PROG 0 EQE ON_TOP 0...
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/hisilicon/hns3/hns3_enet.h')
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3_enet.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h index f09a61d9c626..1715c98d906d 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h @@ -189,12 +189,13 @@ enum hns3_nic_state { #define HNS3_MAX_TSO_SIZE 1048576U #define HNS3_MAX_NON_TSO_SIZE 9728U - +#define HNS3_VECTOR_GL_MASK GENMASK(11, 0) #define HNS3_VECTOR_GL0_OFFSET 0x100 #define HNS3_VECTOR_GL1_OFFSET 0x200 #define HNS3_VECTOR_GL2_OFFSET 0x300 #define HNS3_VECTOR_RL_OFFSET 0x900 #define HNS3_VECTOR_RL_EN_B 6 +#define HNS3_VECTOR_QL_MASK GENMASK(9, 0) #define HNS3_VECTOR_TX_QL_OFFSET 0xe00 #define HNS3_VECTOR_RX_QL_OFFSET 0xf00 |