diff options
| author | Guangbin Huang <huangguangbin2@huawei.com> | 2021-03-12 16:50:15 +0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-03-13 14:11:29 -0800 |
| commit | 024712f51e5711d69ced729fb3398819ed6e8b53 (patch) | |
| tree | f82949bc382d16c111a24268033772fbef0b8b33 /drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | |
| parent | 57a8f46b1bd3f5f43b06f48aab7c1f7ca0936be3 (diff) | |
net: hns3: add ioctl support for imp-controlled PHYs
When the imp-controlled PHYs feature is enabled, driver will not
register mdio bus. In order to support ioctl ops for phy tool to
read or write phy register in this case, the firmware implement
a new command for driver and driver implement ioctl by using this
new command.
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h')
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h index f45ceaa8126f..abeacc990a9b 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h @@ -306,6 +306,7 @@ enum hclge_opcode_type { /* PHY command */ HCLGE_OPC_PHY_LINK_KSETTING = 0x7025, + HCLGE_OPC_PHY_REG = 0x7026, }; #define HCLGE_TQP_REG_OFFSET 0x80000 @@ -1166,6 +1167,13 @@ struct hclge_phy_link_ksetting_1_cmd { u8 rsv[22]; }; +struct hclge_phy_reg_cmd { + __le16 reg_addr; + u8 rsv0[2]; + __le16 reg_val; + u8 rsv1[18]; +}; + int hclge_cmd_init(struct hclge_dev *hdev); static inline void hclge_write_reg(void __iomem *base, u32 reg, u32 value) { |