summaryrefslogtreecommitdiff
path: root/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
diff options
context:
space:
mode:
authorWeihang Li <liweihang@hisilicon.com>2019-06-03 10:09:22 +0800
committerDavid S. Miller <davem@davemloft.net>2019-06-03 15:32:50 -0700
commit00ea6e5fda9d2be1c6af50aa4ebdeecc3149a758 (patch)
tree51d71d6a9454a18297d239659ed42efdfa56eeaf /drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
parent7832f0bd9fa4bd2224be2f8be854315119523df1 (diff)
net: hns3: delay and separate enabling of NIC and ROCE HW errors
All RAS and MSI-X should be enabled just in the final stage of HNS3 initialization. It means that they should be enabled in hclge_init_xxx_client_instance instead of hclge_ae_dev(). Especially MSI-X, if it is enabled before opening vector0 IRQ, there are some chances that a MSI-X error will cause failure on initialization of NIC client instane. So this patch delays enabling of HW errors. Otherwise, we also separate enabling of ROCE RAS from NIC, because it's not reasonable to enable ROCE RAS if we even don't have a ROCE driver. Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h')
-rw-r--r--drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
index c56b11e7451d..81d115ac13db 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
@@ -119,7 +119,8 @@ struct hclge_hw_error {
};
int hclge_config_mac_tnl_int(struct hclge_dev *hdev, bool en);
-int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state);
+int hclge_config_nic_hw_error(struct hclge_dev *hdev, bool state);
+int hclge_config_rocee_ras_interrupt(struct hclge_dev *hdev, bool en);
pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev);
int hclge_handle_hw_msix_error(struct hclge_dev *hdev,
unsigned long *reset_requests);