diff options
| author | Yunsheng Lin <linyunsheng@huawei.com> | 2018-05-15 19:20:11 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-05-16 11:33:08 -0400 |
| commit | 67bf2541f4b9a091e928d75eca544bca4c5db142 (patch) | |
| tree | 861a2cfde48002d574b9988949deead227a8d39c /drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | |
| parent | 0c698257c7befa8d1ec1b8d767758c3d73a2686a (diff) | |
net: hns3: Fixes the back pressure setting when sriov is enabled
When sriov is enabled, the Qset and tc mapping is not longer one
to one relation.
This patch fixes it by mapping all pf and vf's Qset to tc.
Fixes: 848440544b41 ("net: hns3: Add support of TX Scheduler & Shaper to HNS3 driver")
Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com>
Signed-off-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h')
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h index 2dbe177581e9..c2b6e8a6700f 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h @@ -89,6 +89,11 @@ struct hclge_pg_shapping_cmd { __le32 pg_shapping_para; }; +#define HCLGE_BP_GRP_NUM 32 +#define HCLGE_BP_SUB_GRP_ID_S 0 +#define HCLGE_BP_SUB_GRP_ID_M GENMASK(4, 0) +#define HCLGE_BP_GRP_ID_S 5 +#define HCLGE_BP_GRP_ID_M GENMASK(9, 5) struct hclge_bp_to_qs_map_cmd { u8 tc_id; u8 rsvd[2]; |