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authorRoi Dayan <roid@nvidia.com>2022-11-30 15:12:50 +0200
committerSaeed Mahameed <saeedm@nvidia.com>2023-02-14 14:08:25 -0800
commit73af3711c7028286136bb7e9422b19f5a016626d (patch)
tree1aeb2b6dc1e7c379e225fe54cc22000743e3669c /drivers/net/ethernet/mellanox/mlx5/core/lag
parentab9fc405ffd9690266039662286ed69f98c11738 (diff)
net/mlx5: Lag, set different uplink vport metadata in multiport eswitch mode
In a follow-up commit multiport eswitch mode will use a shared fdb. In shared fdb there is a single eswitch fdb and traffic could come from any port. to distinguish between the ports set a different metadata per uplink port. Signed-off-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Maor Dickman <maord@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/lag')
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c67
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.h1
2 files changed, 67 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c
index dd3cb9aa06fd..2f7f2af312d7 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c
@@ -5,8 +5,66 @@
#include <net/nexthop.h>
#include "lag/lag.h"
#include "eswitch.h"
+#include "esw/acl/ofld.h"
#include "lib/mlx5.h"
+static void mlx5_mpesw_metadata_cleanup(struct mlx5_lag *ldev)
+{
+ struct mlx5_core_dev *dev;
+ struct mlx5_eswitch *esw;
+ u32 pf_metadata;
+ int i;
+
+ for (i = 0; i < ldev->ports; i++) {
+ dev = ldev->pf[i].dev;
+ esw = dev->priv.eswitch;
+ pf_metadata = ldev->lag_mpesw.pf_metadata[i];
+ if (!pf_metadata)
+ continue;
+ mlx5_esw_acl_ingress_vport_metadata_update(esw, MLX5_VPORT_UPLINK, 0);
+ mlx5_notifier_call_chain(dev->priv.events, MLX5_DEV_EVENT_MULTIPORT_ESW,
+ (void *)0);
+ mlx5_esw_match_metadata_free(esw, pf_metadata);
+ ldev->lag_mpesw.pf_metadata[i] = 0;
+ }
+}
+
+static int mlx5_mpesw_metadata_set(struct mlx5_lag *ldev)
+{
+ struct mlx5_core_dev *dev;
+ struct mlx5_eswitch *esw;
+ u32 pf_metadata;
+ int i, err;
+
+ for (i = 0; i < ldev->ports; i++) {
+ dev = ldev->pf[i].dev;
+ esw = dev->priv.eswitch;
+ pf_metadata = mlx5_esw_match_metadata_alloc(esw);
+ if (!pf_metadata) {
+ err = -ENOSPC;
+ goto err_metadata;
+ }
+
+ ldev->lag_mpesw.pf_metadata[i] = pf_metadata;
+ err = mlx5_esw_acl_ingress_vport_metadata_update(esw, MLX5_VPORT_UPLINK,
+ pf_metadata);
+ if (err)
+ goto err_metadata;
+ }
+
+ for (i = 0; i < ldev->ports; i++) {
+ dev = ldev->pf[i].dev;
+ mlx5_notifier_call_chain(dev->priv.events, MLX5_DEV_EVENT_MULTIPORT_ESW,
+ (void *)0);
+ }
+
+ return 0;
+
+err_metadata:
+ mlx5_mpesw_metadata_cleanup(ldev);
+ return err;
+}
+
static int enable_mpesw(struct mlx5_lag *ldev)
{
struct mlx5_core_dev *dev = ldev->pf[MLX5_LAG_P1].dev;
@@ -21,6 +79,10 @@ static int enable_mpesw(struct mlx5_lag *ldev)
!mlx5_lag_check_prereq(ldev))
return -EOPNOTSUPP;
+ err = mlx5_mpesw_metadata_set(ldev);
+ if (err)
+ return err;
+
err = mlx5_activate_lag(ldev, NULL, MLX5_LAG_MODE_MPESW, false);
if (err) {
mlx5_core_warn(dev, "Failed to create LAG in MPESW mode (%d)\n", err);
@@ -30,13 +92,16 @@ static int enable_mpesw(struct mlx5_lag *ldev)
return 0;
out_err:
+ mlx5_mpesw_metadata_cleanup(ldev);
return err;
}
static void disable_mpesw(struct mlx5_lag *ldev)
{
- if (ldev->mode == MLX5_LAG_MODE_MPESW)
+ if (ldev->mode == MLX5_LAG_MODE_MPESW) {
+ mlx5_mpesw_metadata_cleanup(ldev);
mlx5_disable_lag(ldev);
+ }
}
static void mlx5_mpesw_work(struct work_struct *work)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.h b/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.h
index d857ea988bf2..02520f27a033 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.h
@@ -9,6 +9,7 @@
struct lag_mpesw {
struct work_struct mpesw_work;
+ u32 pf_metadata[MLX5_MAX_PORTS];
};
enum mpesw_op {