diff options
| author | Thierry Reding <treding@nvidia.com> | 2017-03-10 17:34:59 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-03-12 23:35:20 -0700 |
| commit | 356b7557857e43c52561ac722168ea173f5f6ddc (patch) | |
| tree | c5b0839e2bb339c7d8207ab10e80ac40b3952105 /drivers/net/ethernet/stmicro/stmmac/dwmac4.h | |
| parent | 11fbf811c8e8a11529214a494eab25e21ca86739 (diff) | |
net: stmmac: Program RX queue size and flow control
Program the receive queue size based on the RX FIFO size and enable
hardware flow control for large FIFOs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/dwmac4.h')
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h index 83f5e953e291..3b1828b4d294 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h @@ -182,6 +182,7 @@ enum power_event { #define MTL_OP_MODE_TSF BIT(1) #define MTL_OP_MODE_TQS_MASK GENMASK(24, 16) +#define MTL_OP_MODE_TQS_SHIFT 16 #define MTL_OP_MODE_TTC_MASK 0x70 #define MTL_OP_MODE_TTC_SHIFT 4 @@ -195,6 +196,17 @@ enum power_event { #define MTL_OP_MODE_TTC_384 (6 << MTL_OP_MODE_TTC_SHIFT) #define MTL_OP_MODE_TTC_512 (7 << MTL_OP_MODE_TTC_SHIFT) +#define MTL_OP_MODE_RQS_MASK GENMASK(29, 20) +#define MTL_OP_MODE_RQS_SHIFT 20 + +#define MTL_OP_MODE_RFD_MASK GENMASK(19, 14) +#define MTL_OP_MODE_RFD_SHIFT 14 + +#define MTL_OP_MODE_RFA_MASK GENMASK(13, 8) +#define MTL_OP_MODE_RFA_SHIFT 8 + +#define MTL_OP_MODE_EHFC BIT(7) + #define MTL_OP_MODE_RTC_MASK 0x18 #define MTL_OP_MODE_RTC_SHIFT 3 |