diff options
| author | Giuseppe CAVALLARO <peppe.cavallaro@st.com> | 2016-06-24 15:16:25 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-06-28 08:54:23 -0400 |
| commit | 3fe5cadbd3494b9d0fcea41ccefeb319528c774e (patch) | |
| tree | 6301e478e55fdc4c53ffef0270cd1a4224504398 /drivers/net/ethernet/stmicro/stmmac/dwmac4.h | |
| parent | 70523e639bf8ca09b3357371c3546cee55c06351 (diff) | |
drivers: net: stmmac: rework core ISR to better manage PCS and PMT
By default, all gmac cores disable the PCS block and always
enable the PMT.
Note that this is done in a different way by 3.x and 4.x cores.
With this rework, PCS and PMT interrupt masks can be driven by
parameters now moved inside the mac_device_info structure
and the settings follow what the HW capability register reports.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/dwmac4.h')
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h index 227fa20d10c1..6f4f5ce25114 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h @@ -52,9 +52,18 @@ #define GMAC_TX_FLOW_CTRL_PT_SHIFT 16 /* MAC Interrupt bitmap*/ +#define GMAC_INT_RGSMIIS BIT(0) +#define GMAC_INT_PCS_LINK BIT(1) +#define GMAC_INT_PCS_ANE BIT(2) +#define GMAC_INT_PCS_PHYIS BIT(3) #define GMAC_INT_PMT_EN BIT(4) #define GMAC_INT_LPI_EN BIT(5) +#define GMAC_PCS_IRQ_DEFAULT (GMAC_INT_RGSMIIS | GMAC_INT_PCS_LINK | \ + GMAC_INT_PCS_ANE) + +#define GMAC_INT_DEFAULT_MASK GMAC_INT_PMT_EN + enum dwmac4_irq_status { time_stamp_irq = 0x00001000, mmc_rx_csum_offload_irq = 0x00000800, |