diff options
| author | Joakim Zhang <qiangqing.zhang@nxp.com> | 2021-06-08 11:15:35 +0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-06-08 11:41:24 -0700 |
| commit | 6813cc8cfdaf401476e1a007cec8ae338cefa573 (patch) | |
| tree | 1c2c1b0943586e65847584348ff36080c61648d6 /drivers/net/phy/realtek.c | |
| parent | d90db36a9e748c9d886df15f5e17b341f0e5bcd5 (diff) | |
net: phy: realtek: add delay to fix RXC generation issue
PHY will delay about 11.5ms to generate RXC clock when switching from
power down to normal operation. Read/write registers would also cause RXC
become unstable and stop for a while during this process. Realtek engineer
suggests 15ms or more delay can workaround this issue.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/realtek.c')
| -rw-r--r-- | drivers/net/phy/realtek.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 79dc55bb4091..1b844a06fe72 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -410,6 +410,19 @@ static int rtl8211f_config_init(struct phy_device *phydev) return genphy_soft_reset(phydev); } +static int rtl821x_resume(struct phy_device *phydev) +{ + int ret; + + ret = genphy_resume(phydev); + if (ret < 0) + return ret; + + msleep(20); + + return 0; +} + static int rtl8211e_config_init(struct phy_device *phydev) { int ret = 0, oldpage; @@ -906,7 +919,7 @@ static struct phy_driver realtek_drvs[] = { .config_intr = &rtl8211f_config_intr, .handle_interrupt = rtl8211f_handle_interrupt, .suspend = genphy_suspend, - .resume = genphy_resume, + .resume = rtl821x_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, }, { |