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authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2025-03-16 12:39:54 +0000
committerPaolo Abeni <pabeni@redhat.com>2025-03-21 21:38:45 +0100
commitbfc17c1658353f22843c7c13e27c2d31950f1887 (patch)
treea8f76aef45b6a7019ef27d5e8f381e20cccdc767 /drivers/net/phy
parent4b9235a880f13ae3443465192603b298a603b2c5 (diff)
net: phy: realtek: disable PHY-mode EEE
Realtek RTL8211F has a "PHY-mode" EEE support which interferes with an IEEE 802.3 compliant implementation. This mode defaults to enabled, and results in the MAC receive path not seeing the link transition to LPI state. Fix this by disabling PHY-mode EEE. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/E1ttnHW-00785s-Uq@rmk-PC.armlinux.org.uk Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/realtek/realtek_main.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
index 7a0b19d66aca..893c82479671 100644
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -33,6 +33,9 @@
#define RTL8211F_PHYCR1 0x18
#define RTL8211F_PHYCR2 0x19
+#define RTL8211F_CLKOUT_EN BIT(0)
+#define RTL8211F_PHYCR2_PHY_EEE_ENABLE BIT(5)
+
#define RTL8211F_INSR 0x1d
#define RTL8211F_LEDCR 0x10
@@ -55,8 +58,6 @@
#define RTL8211E_TX_DELAY BIT(12)
#define RTL8211E_RX_DELAY BIT(11)
-#define RTL8211F_CLKOUT_EN BIT(0)
-
#define RTL8201F_ISR 0x1e
#define RTL8201F_ISR_ANERR BIT(15)
#define RTL8201F_ISR_DUPLEX BIT(13)
@@ -453,6 +454,12 @@ static int rtl8211f_config_init(struct phy_device *phydev)
str_enabled_disabled(val_rxdly));
}
+ /* Disable PHY-mode EEE so LPI is passed to the MAC */
+ ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
+ RTL8211F_PHYCR2_PHY_EEE_ENABLE, 0);
+ if (ret)
+ return ret;
+
if (priv->has_phycr2) {
ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
RTL8211F_CLKOUT_EN, priv->phycr2);