diff options
| author | Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> | 2023-11-24 10:47:23 +0200 |
|---|---|---|
| committer | Kalle Valo <kvalo@kernel.org> | 2023-12-01 14:41:04 +0200 |
| commit | 05b311a3f9153226b5603e33831aec34fd38e228 (patch) | |
| tree | 0f183b501e7b79b130c7c8ace19744b94db7bcd9 /drivers/net/wireless/realtek/rtlwifi | |
| parent | 7bd350d2ac915e66d9a23c60fd2fdf41c4233980 (diff) | |
wifi: rtlwifi: rtl8821ae: Access full PMCS reg and use pci_regs.h
_rtl8821ae_clear_pci_pme_status() accesses the upper byte of the Power
Management Control/Status register (PMCS) with literal 5 offset.
Access the entire PMCS register using defines from pci_regs.h to
improve code readability.
While at it, remove the obvious comment and tweak debug prints
slightly to not sound misleading.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231124084725.12738-9-ilpo.jarvinen@linux.intel.com
Diffstat (limited to 'drivers/net/wireless/realtek/rtlwifi')
| -rw-r--r-- | drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c | 21 |
1 files changed, 7 insertions, 14 deletions
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c index 7cc648d49f2d..f4b232f038a9 100644 --- a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c @@ -2271,7 +2271,7 @@ static void _rtl8821ae_clear_pci_pme_status(struct ieee80211_hw *hw) struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); struct pci_dev *pdev = rtlpci->pdev; - u8 pmcs_reg; + u16 pmcs_reg; u8 pm_cap; pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); @@ -2281,23 +2281,16 @@ static void _rtl8821ae_clear_pci_pme_status(struct ieee80211_hw *hw) return; } - /* Get the PM CSR (Control/Status Register), - * The PME_Status is located at PM Capatibility offset 5, bit 7 - */ - pci_read_config_byte(pdev, pm_cap + 5, &pmcs_reg); - - if (pmcs_reg & BIT(7)) { + pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pmcs_reg); + if (pmcs_reg & PCI_PM_CTRL_PME_STATUS) { /* Clear PME_Status with write */ - pci_write_config_byte(pdev, pm_cap + 5, pmcs_reg); - /* Read it back to check */ - pci_read_config_byte(pdev, pm_cap + 5, &pmcs_reg); + pci_write_config_word(pdev, pm_cap + PCI_PM_CTRL, pmcs_reg); + pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pmcs_reg); rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, - "Clear PME status 0x%2x to 0x%2x\n", - pm_cap + 5, pmcs_reg); + "Cleared PME status, PMCS reg = 0x%4x\n", pmcs_reg); } else { rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, - "PME status(0x%2x) = 0x%2x\n", - pm_cap + 5, pmcs_reg); + "PMCS reg = 0x%4x\n", pmcs_reg); } } |