diff options
| author | Zong-Zhe Yang <kevin_yang@realtek.com> | 2023-05-31 14:07:11 +0800 |
|---|---|---|
| committer | Kalle Valo <kvalo@kernel.org> | 2023-06-08 18:58:17 +0300 |
| commit | b25e755e5e418aa7b537b8b2a2506c34c53df2d5 (patch) | |
| tree | 29130dac556fbcf0c5fb3e0e3da0bc4bd5679545 /drivers/net/wireless/realtek/rtw89/reg.h | |
| parent | 9c52e8bf07c7097e09503fcad7cb156deffef619 (diff) | |
wifi: rtw89: debug: txpwr table access only valid page according to chip
We now support RTL8851B which has only single RF path. For chip with
single RF path, TX power page is valid only in single path section.
So, we refine debugfs txpwr table to access TX power page according
to RF path number of runtime chip. It can prevent us from reading
beyond valid sections.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230531060713.57203-3-pkshih@realtek.com
Diffstat (limited to 'drivers/net/wireless/realtek/rtw89/reg.h')
| -rw-r--r-- | drivers/net/wireless/realtek/rtw89/reg.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h index 7c2807345f60..b6ffa923133d 100644 --- a/drivers/net/wireless/realtek/rtw89/reg.h +++ b/drivers/net/wireless/realtek/rtw89/reg.h @@ -3342,16 +3342,22 @@ #define B_AX_PWR_UL_TB_2T_MASK GENMASK(4, 0) #define B_AX_PWR_UL_TB_2T_V1_MASK GENMASK(7, 0) #define R_AX_PWR_BY_RATE_TABLE0 0xD2C0 +#define R_AX_PWR_BY_RATE_TABLE6 0xD2D8 #define R_AX_PWR_BY_RATE_TABLE10 0xD2E8 #define R_AX_PWR_BY_RATE R_AX_PWR_BY_RATE_TABLE0 +#define R_AX_PWR_BY_RATE_1SS_MAX R_AX_PWR_BY_RATE_TABLE6 #define R_AX_PWR_BY_RATE_MAX R_AX_PWR_BY_RATE_TABLE10 #define R_AX_PWR_LMT_TABLE0 0xD2EC +#define R_AX_PWR_LMT_TABLE9 0xD310 #define R_AX_PWR_LMT_TABLE19 0xD338 #define R_AX_PWR_LMT R_AX_PWR_LMT_TABLE0 +#define R_AX_PWR_LMT_1SS_MAX R_AX_PWR_LMT_TABLE9 #define R_AX_PWR_LMT_MAX R_AX_PWR_LMT_TABLE19 #define R_AX_PWR_RU_LMT_TABLE0 0xD33C +#define R_AX_PWR_RU_LMT_TABLE5 0xD350 #define R_AX_PWR_RU_LMT_TABLE11 0xD368 #define R_AX_PWR_RU_LMT R_AX_PWR_RU_LMT_TABLE0 +#define R_AX_PWR_RU_LMT_1SS_MAX R_AX_PWR_RU_LMT_TABLE5 #define R_AX_PWR_RU_LMT_MAX R_AX_PWR_RU_LMT_TABLE11 #define R_AX_PWR_MACID_LMT_TABLE0 0xD36C #define R_AX_PWR_MACID_LMT_TABLE127 0xD568 |