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authorJay Fang <f.fangjian@huawei.com>2018-03-12 17:13:32 +0800
committerBjorn Helgaas <bhelgaas@google.com>2018-03-21 16:23:55 -0500
commit1acfb9b7ee0b1881bb8e875b6757976e48293ec4 (patch)
treed23a90908da7413d67775edb40d452c7e2913007 /drivers/pci/pci-sysfs.c
parent7928b2cbe55b2a410a0f5c1f154610059c57b1b2 (diff)
PCI: Add decoding for 16 GT/s link speed
PCIe 4.0 defines the 16.0 GT/s link speed. Links can run at that speed without any Linux changes, but previously their sysfs "max_link_speed" and "current_link_speed" files contained "Unknown speed", not the expected "16.0 GT/s". Add decoding for the new 16 GT/s link speed. Signed-off-by: Jay Fang <f.fangjian@huawei.com> [bhelgaas: add PCI_EXP_LNKCAP2_SLS_16_0GB] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Dongdong Liu <liudongdong3@huawei.com>
Diffstat (limited to 'drivers/pci/pci-sysfs.c')
-rw-r--r--drivers/pci/pci-sysfs.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index eb6bee8724cc..7dc5be545d18 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -168,6 +168,9 @@ static ssize_t max_link_speed_show(struct device *dev,
return -EINVAL;
switch (linkcap & PCI_EXP_LNKCAP_SLS) {
+ case PCI_EXP_LNKCAP_SLS_16_0GB:
+ speed = "16 GT/s";
+ break;
case PCI_EXP_LNKCAP_SLS_8_0GB:
speed = "8 GT/s";
break;
@@ -213,6 +216,9 @@ static ssize_t current_link_speed_show(struct device *dev,
return -EINVAL;
switch (linkstat & PCI_EXP_LNKSTA_CLS) {
+ case PCI_EXP_LNKSTA_CLS_16_0GB:
+ speed = "16 GT/s";
+ break;
case PCI_EXP_LNKSTA_CLS_8_0GB:
speed = "8 GT/s";
break;