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authorLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2017-04-19 17:48:58 +0100
committerBjorn Helgaas <bhelgaas@google.com>2017-04-24 13:53:15 -0500
commitcd00f084ed1d501c8cb391c6d98b4f31b2a9a3e2 (patch)
tree1c6acc43a63b05af35f8ca5a3da30f2e62510399 /drivers/pci
parenteb21f9e82009b8bce01aa242f15c1acbebbd76e2 (diff)
PCI: xilinx-nwl: Update PCI config space remap function
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/host/pcie-xilinx-nwl.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c
index 4c3e0ab35496..4b16b26ae909 100644
--- a/drivers/pci/host/pcie-xilinx-nwl.c
+++ b/drivers/pci/host/pcie-xilinx-nwl.c
@@ -761,7 +761,7 @@ static int nwl_pcie_parse_dt(struct nwl_pcie *pcie,
pcie->phys_pcie_reg_base = res->start;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg");
- pcie->ecam_base = devm_ioremap_resource(dev, res);
+ pcie->ecam_base = devm_pci_remap_cfg_resource(dev, res);
if (IS_ERR(pcie->ecam_base))
return PTR_ERR(pcie->ecam_base);
pcie->phys_ecam_base = res->start;