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authorShaokun Zhang <zhangshaokun@hisilicon.com>2021-03-08 14:50:34 +0800
committerWill Deacon <will@kernel.org>2021-03-25 13:03:46 +0000
commitcce03e702c9f26a43b16c51bf03029911feab692 (patch)
tree9f35eef77d340a535f59007281df98e76c97945e /drivers/perf/hisilicon/hisi_uncore_pmu.h
parent932f6a99f9b0c6b7039a5e2ce961009a8dc8c07c (diff)
drivers/perf: hisi: Update DDRC PMU for programmable counter
DDRC PMU's events are useful for performance profiling, but the events are limited and counter is fixed. On HiSilicon Hip09 platform, PMU counters are the programmable and more events are supported. Let's add the DDRC PMU v2 driver. Bandwidth events are exposed directly in driver and some more events will listed in JSON file later. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: John Garry <john.garry@huawei.com> Co-developed-by: Qi Liu <liuqi115@huawei.com> Signed-off-by: Qi Liu <liuqi115@huawei.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Link: https://lore.kernel.org/r/1615186237-22263-7-git-send-email-zhangshaokun@hisilicon.com Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/perf/hisilicon/hisi_uncore_pmu.h')
-rw-r--r--drivers/perf/hisilicon/hisi_uncore_pmu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.h b/drivers/perf/hisilicon/hisi_uncore_pmu.h
index 1591dbc6a119..ea9d89bbc1ea 100644
--- a/drivers/perf/hisilicon/hisi_uncore_pmu.h
+++ b/drivers/perf/hisilicon/hisi_uncore_pmu.h
@@ -85,6 +85,8 @@ struct hisi_pmu {
void __iomem *base;
/* the ID of the PMU modules */
u32 index_id;
+ /* For DDRC PMU v2: each DDRC has more than one DMC */
+ u32 sub_id;
int num_counters;
int counter_bits;
/* check event code range */