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authorLinus Torvalds <torvalds@linux-foundation.org>2019-01-01 13:19:16 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2019-01-01 13:19:16 -0800
commitc9bef4a651769927445900564781a9c99fdf6258 (patch)
treed7611bd01581bbd49f189b304f1d6a23c4477c3b /drivers/pinctrl/intel/pinctrl-cannonlake.c
parent115502a6f31d84d8172a71283aaea266302a8ad5 (diff)
parent88cc9fc41c7318565bcf28a843b1e4e3f2acf894 (diff)
Merge tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "We have no core changes but lots of incremental development in drivers all over the place: Renesas, NXP, Mediatek and Actions Semiconductor keep churning out new SoCs. I have some subtree maintainers for Renesas and Intel helping out to keep down the load, it's been working smoothly (Samsung also have a subtree but it was not used this cycle.) New drivers: - NXP (ex Freescale) i.MX 8 QXP SoC driver. - Mediatek MT6797 SoC driver. - Mediatek MT7629 SoC driver. - Actions Semiconductor S700 SoC driver. - Renesas RZ/A2 SoC driver. - Allwinner sunxi suniv F1C100 SoC driver. - Qualcomm PMS405 PMIC driver. - Microsemi Ocelot Jaguar2 SoC driver. Improvements: - Some RT improvements (using raw spinlocks where appropriate). - A lot of new pin sets on the Renesas PFC pin controllers. - GPIO hogs now work on the Qualcomm SPMI/SSBI pin controller GPIO chips, and Xway. - Major modernization of the Intel pin control drivers. - STM32 pin control driver will now synchronize usage of pins with another CPU using a hardware spinlock" * tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (145 commits) dt-bindings: arm: fsl-scu: add imx8qm pinctrl support pinctrl: freescale: Break dependency on SOC_IMX8MQ for i.MX8MQ pinctrl: imx-scu: Depend on IMX_SCU pinctrl: ocelot: Add dependency on HAS_IOMEM pinctrl: ocelot: add MSCC Jaguar2 support pinctrl: bcm: ns: support updated DT binding as syscon subnode dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon MAINTAINERS: merge at91 pinctrl entries pinctrl: imx8qxp: break the dependency on SOC_IMX8QXP pinctrl: uniphier: constify uniphier_pinctrl_socdata pinctrl: mediatek: improve Kconfig dependencies pinctrl: msm: mark PM functions as __maybe_unused dt-bindings: pinctrl: sunxi: Add supply properties pinctrl: meson: meson8b: add the missing GPIO_GROUPs for BOOT and CARD pinctrl: meson: meson8: add the missing GPIO_GROUPs for BOOT and CARD pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs" pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs" pinctrl: meson: meson8b: fix the GPIO function for the GPIOAO pins pinctrl: meson: meson8: fix the GPIO function for the GPIOAO pins pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length ...
Diffstat (limited to 'drivers/pinctrl/intel/pinctrl-cannonlake.c')
-rw-r--r--drivers/pinctrl/intel/pinctrl-cannonlake.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-cannonlake.c b/drivers/pinctrl/intel/pinctrl-cannonlake.c
index fb121b3ed2f2..08024b065033 100644
--- a/drivers/pinctrl/intel/pinctrl-cannonlake.c
+++ b/drivers/pinctrl/intel/pinctrl-cannonlake.c
@@ -829,19 +829,14 @@ static const struct intel_pinctrl_soc_data cnllp_soc_data = {
static const struct acpi_device_id cnl_pinctrl_acpi_match[] = {
{ "INT3450", (kernel_ulong_t)&cnlh_soc_data },
{ "INT34BB", (kernel_ulong_t)&cnllp_soc_data },
- { },
+ { }
};
MODULE_DEVICE_TABLE(acpi, cnl_pinctrl_acpi_match);
-static int cnl_pinctrl_probe(struct platform_device *pdev)
-{
- return intel_pinctrl_probe_by_hid(pdev);
-}
-
static INTEL_PINCTRL_PM_OPS(cnl_pinctrl_pm_ops);
static struct platform_driver cnl_pinctrl_driver = {
- .probe = cnl_pinctrl_probe,
+ .probe = intel_pinctrl_probe_by_hid,
.driver = {
.name = "cannonlake-pinctrl",
.acpi_match_table = cnl_pinctrl_acpi_match,