diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-03-13 13:58:25 +0200 |
|---|---|---|
| committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-04-03 14:49:47 +0300 |
| commit | 10d64c871c309afb2403a3fadf5ff3ab7d96d8ed (patch) | |
| tree | b2fa869861a10acade198c0a1231d070da7ae645 /drivers/pinctrl/intel | |
| parent | d6cb77228e3ae070061195a6fff6ba7c3c0b8e47 (diff) | |
pinctrl: cedarfork: Update pin names according to v1.13c
Version 1.13c of pin list has some changes in pin names for
Intel Cedarfork.
Update the driver accordingly.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linar.org>
Diffstat (limited to 'drivers/pinctrl/intel')
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-cedarfork.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-cedarfork.c b/drivers/pinctrl/intel/pinctrl-cedarfork.c index b7d632f1dbf6..aa6f9040d3d8 100644 --- a/drivers/pinctrl/intel/pinctrl-cedarfork.c +++ b/drivers/pinctrl/intel/pinctrl-cedarfork.c @@ -91,13 +91,13 @@ static const struct pinctrl_pin_desc cdf_pins[] = { PINCTRL_PIN(43, "MEMTRIP_N"), PINCTRL_PIN(44, "UART0_RXD"), PINCTRL_PIN(45, "UART0_TXD"), - PINCTRL_PIN(46, "UART1_RXD"), - PINCTRL_PIN(47, "UART1_TXD"), + PINCTRL_PIN(46, "GBE_UART_RXD"), + PINCTRL_PIN(47, "GBE_UART_TXD"), /* WEST01 */ PINCTRL_PIN(48, "GBE_GPIO13"), PINCTRL_PIN(49, "AUX_PWR"), - PINCTRL_PIN(50, "CPU_GP_2"), - PINCTRL_PIN(51, "CPU_GP_3"), + PINCTRL_PIN(50, "UART0_RTS"), + PINCTRL_PIN(51, "UART0_CTS"), PINCTRL_PIN(52, "FAN_PWM_0"), PINCTRL_PIN(53, "FAN_PWM_1"), PINCTRL_PIN(54, "FAN_PWM_2"), @@ -201,8 +201,8 @@ static const struct pinctrl_pin_desc cdf_pins[] = { /* WESTF */ PINCTRL_PIN(145, "NAC_RMII_CLK"), PINCTRL_PIN(146, "NAC_RGMII_CLK"), - PINCTRL_PIN(147, "NAC_SPARE0"), - PINCTRL_PIN(148, "NAC_SPARE1"), + PINCTRL_PIN(147, "NAC_GBE_SMB_CLK_TX_N2S"), + PINCTRL_PIN(148, "NAC_GBE_SMB_DATA_TX_N2S"), PINCTRL_PIN(149, "NAC_SPARE2"), PINCTRL_PIN(150, "NAC_INIT_SX_WAKE_N"), PINCTRL_PIN(151, "NAC_GBE_GPIO0_S2N"), @@ -219,8 +219,8 @@ static const struct pinctrl_pin_desc cdf_pins[] = { PINCTRL_PIN(162, "NAC_NCSI_TXD1"), PINCTRL_PIN(163, "NAC_NCSI_ARB_OUT"), PINCTRL_PIN(164, "NAC_NCSI_OE_N"), - PINCTRL_PIN(165, "NAC_GBE_SMB_CLK"), - PINCTRL_PIN(166, "NAC_GBE_SMB_DATA"), + PINCTRL_PIN(165, "NAC_GBE_SMB_CLK_RX_S2N"), + PINCTRL_PIN(166, "NAC_GBE_SMB_DATA_RX_S2N"), PINCTRL_PIN(167, "NAC_GBE_SMB_ALRT_N"), /* EAST2 */ PINCTRL_PIN(168, "USB_OC0_N"), @@ -232,7 +232,7 @@ static const struct pinctrl_pin_desc cdf_pins[] = { PINCTRL_PIN(174, "GBE_GPIO5"), PINCTRL_PIN(175, "GBE_GPIO6"), PINCTRL_PIN(176, "GBE_GPIO7"), - PINCTRL_PIN(177, "GBE_GPIO8"), + PINCTRL_PIN(177, "SPI_TPM_CS_N"), PINCTRL_PIN(178, "GBE_GPIO9"), PINCTRL_PIN(179, "GBE_GPIO10"), PINCTRL_PIN(180, "GBE_GPIO11"), |