diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-06-12 12:24:42 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-06-12 12:24:42 -0700 |
commit | 9433a51ec1533e0620ff08d0318d215de73ceb77 (patch) | |
tree | 07a745666e8d7d02a744266a74c4a2fb45728ec4 /drivers/pwm/pwm-imx27.c | |
parent | 8f02f363f76f99f08117336cfac7f24c76b25be3 (diff) | |
parent | f5641d053d46a9a18fe13f2ecb4a7b4a66d9cdf7 (diff) |
Merge tag 'pwm/for-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"Nothing too exciting for this cycle. A couple of fixes across the
board, and Lee volunteered to help with patch review"
* tag 'pwm/for-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
pwm: Add missing "CONFIG_" prefix
MAINTAINERS: Add Lee Jones as reviewer for the PWM subsystem
pwm: imx27: Fix rounding behavior
pwm: rockchip: Simplify rockchip_pwm_get_state()
pwm: img: Call pm_runtime_put() in pm_runtime_get_sync() failed case
pwm: tegra: Support dynamic clock frequency configuration
pwm: jz4740: Add support for the JZ4725B
pwm: jz4740: Make PWM start with the active part
pwm: jz4740: Enhance precision in calculation of duty cycle
pwm: jz4740: Drop dependency on MACH_INGENIC
pwm: lpss: Fix get_state runtime-pm reference handling
pwm: sun4i: Support direct clock output on Allwinner A64
pwm: Add support for Azoteq IQS620A PWM generator
dt-bindings: pwm: rcar: add r8a77961 support
pwm: Add missing '\n' in log messages
Diffstat (limited to 'drivers/pwm/pwm-imx27.c')
-rw-r--r-- | drivers/pwm/pwm-imx27.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/pwm/pwm-imx27.c b/drivers/pwm/pwm-imx27.c index a6e40d4c485f..732a6f3701e8 100644 --- a/drivers/pwm/pwm-imx27.c +++ b/drivers/pwm/pwm-imx27.c @@ -150,13 +150,12 @@ static void pwm_imx27_get_state(struct pwm_chip *chip, prescaler = MX3_PWMCR_PRESCALER_GET(val); pwm_clk = clk_get_rate(imx->clk_per); - pwm_clk = DIV_ROUND_CLOSEST_ULL(pwm_clk, prescaler); val = readl(imx->mmio_base + MX3_PWMPR); period = val >= MX3_PWMPR_MAX ? MX3_PWMPR_MAX : val; /* PWMOUT (Hz) = PWMCLK / (PWMPR + 2) */ - tmp = NSEC_PER_SEC * (u64)(period + 2); - state->period = DIV_ROUND_CLOSEST_ULL(tmp, pwm_clk); + tmp = NSEC_PER_SEC * (u64)(period + 2) * prescaler; + state->period = DIV_ROUND_UP_ULL(tmp, pwm_clk); /* * PWMSAR can be read only if PWM is enabled. If the PWM is disabled, @@ -167,8 +166,8 @@ static void pwm_imx27_get_state(struct pwm_chip *chip, else val = imx->duty_cycle; - tmp = NSEC_PER_SEC * (u64)(val); - state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, pwm_clk); + tmp = NSEC_PER_SEC * (u64)(val) * prescaler; + state->duty_cycle = DIV_ROUND_UP_ULL(tmp, pwm_clk); pwm_imx27_clk_disable_unprepare(imx); } @@ -220,22 +219,23 @@ static int pwm_imx27_apply(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip); struct pwm_state cstate; unsigned long long c; + unsigned long long clkrate; int ret; u32 cr; pwm_get_state(pwm, &cstate); - c = clk_get_rate(imx->clk_per); - c *= state->period; + clkrate = clk_get_rate(imx->clk_per); + c = clkrate * state->period; - do_div(c, 1000000000); + do_div(c, NSEC_PER_SEC); period_cycles = c; prescale = period_cycles / 0x10000 + 1; period_cycles /= prescale; - c = (unsigned long long)period_cycles * state->duty_cycle; - do_div(c, state->period); + c = clkrate * state->duty_cycle; + do_div(c, NSEC_PER_SEC * prescale); duty_cycles = c; /* |