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authorHerve Codina <herve.codina@bootlin.com>2023-02-17 15:56:41 +0100
committerMark Brown <broonie@kernel.org>2023-03-05 23:37:03 +0000
commit3178d58e0b9772d690456c0bdf8c9f5e191d45f1 (patch)
tree197b6b3bd58fbfc5ba16684df7499f399f9062e4 /drivers/soc/fsl/qe/Kconfig
parenta9b121327c939624e3e2c244283883501846fa97 (diff)
soc: fsl: cpm1: Add support for QMC
The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one serial controller using the same TDM physical interface routed from the TSA. It is available in some PowerQUICC SoC such as the MPC885 or MPC866. It is also available on some Quicc Engine SoCs. This current version support CPM1 SoCs only and some enhancement are needed to support Quicc Engine SoCs. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Acked-by: Li Yang <leoyang.li@nxp.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20230217145645.1768659-7-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/soc/fsl/qe/Kconfig')
-rw-r--r--drivers/soc/fsl/qe/Kconfig12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/soc/fsl/qe/Kconfig b/drivers/soc/fsl/qe/Kconfig
index b0088495c323..f90cfdf0c763 100644
--- a/drivers/soc/fsl/qe/Kconfig
+++ b/drivers/soc/fsl/qe/Kconfig
@@ -44,6 +44,18 @@ config CPM_TSA
This option enables support for this
controller
+config CPM_QMC
+ tristate "CPM QMC support"
+ depends on OF && HAS_IOMEM
+ depends on CPM1 || (SOC_FSL && COMPILE_TEST)
+ depends on CPM_TSA
+ help
+ Freescale CPM QUICC Multichannel Controller
+ (QMC)
+
+ This option enables support for this
+ controller
+
config QE_TDM
bool
default y if FSL_UCC_HDLC