diff options
author | Raju Rangoju <Raju.Rangoju@amd.com> | 2024-09-25 19:06:43 +0530 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2024-09-30 01:11:55 +0200 |
commit | 9674f1694e644aa5cc50e1009481cb4c5b4e8f8f (patch) | |
tree | 66cc186de00346eb299d61cd5070fdf88e981cfd /drivers/spi/spi-amd.c | |
parent | 145d61c0ab3344f7f76f5f8cdd1134477c1def98 (diff) |
spi: spi_amd: Set controller address mode
Add changes to set the controller address mode before initiating commands.
The AMD SPI0 controller(AMDI0062) supports both 24-bit and 32-bit address
modes, while the HID2 SPI controller(AMDI0063) supports only the 24-bit
address mode. So this change is applicable only for SPI0 controller.
Co-developed-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Signed-off-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Co-developed-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Link: https://patch.msgid.link/20240925133644.2922359-8-Raju.Rangoju@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-amd.c')
-rw-r--r-- | drivers/spi/spi-amd.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/spi/spi-amd.c b/drivers/spi/spi-amd.c index f146366a67e7..50dfdf2ab6ee 100644 --- a/drivers/spi/spi-amd.c +++ b/drivers/spi/spi-amd.c @@ -34,6 +34,7 @@ #define AMD_SPI_TX_COUNT_REG 0x48 #define AMD_SPI_RX_COUNT_REG 0x4B #define AMD_SPI_STATUS_REG 0x4C +#define AMD_SPI_ADDR32CTRL_REG 0x50 #define AMD_SPI_FIFO_SIZE 70 #define AMD_SPI_MEM_SIZE 200 @@ -548,6 +549,17 @@ static void amd_spi_mem_data_in(struct amd_spi *amd_spi, nbytes + i - left_data); } +static void amd_set_spi_addr_mode(struct amd_spi *amd_spi, + const struct spi_mem_op *op) +{ + u32 val = amd_spi_readreg32(amd_spi, AMD_SPI_ADDR32CTRL_REG); + + if (amd_is_spi_read_cmd_4b(op->cmd.opcode)) + amd_spi_writereg32(amd_spi, AMD_SPI_ADDR32CTRL_REG, val | BIT(0)); + else + amd_spi_writereg32(amd_spi, AMD_SPI_ADDR32CTRL_REG, val & ~BIT(0)); +} + static int amd_spi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { @@ -560,6 +572,9 @@ static int amd_spi_exec_mem_op(struct spi_mem *mem, if (ret) return ret; + if (amd_spi->version == AMD_SPI_V2) + amd_set_spi_addr_mode(amd_spi, op); + switch (op->data.dir) { case SPI_MEM_DATA_IN: amd_spi_mem_data_in(amd_spi, op); |