summaryrefslogtreecommitdiff
path: root/drivers/spi
diff options
context:
space:
mode:
authorTudor Ambarus <tudor.ambarus@microchip.com>2019-06-28 15:30:34 +0000
committerMark Brown <broonie@kernel.org>2019-07-02 14:09:23 +0100
commitab735611402f4278420068fc37cfb03dab626436 (patch)
treec916182bceb81c95316cc8f7061233864d6bc3ad /drivers/spi
parent5b74e9a306267be3b371b309faef8626b18e6423 (diff)
spi: atmel-quadspi: fix resume call
When waking up from the Suspend-to-RAM state, the following error was seen: m25p80 spi2.0: flash operation timed out The flash remained in an undefined state, returning 0xFFs. Fix it by setting the Serial Clock Baud Rate, as it was set before the conversion to SPIMEM. Tested with sama5d2_xplained and mx25l25673g spi-nor in Backup + Self-Refresh and Suspend modes. Fixes: 0e6aae08e9ae ("spi: Add QuadSPI driver for Atmel SAMA5D2") Reported-by: Mark Deneen <mdeneen@gmail.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/atmel-quadspi.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c
index 32eb7447c31a..6a7d7b553d95 100644
--- a/drivers/spi/atmel-quadspi.c
+++ b/drivers/spi/atmel-quadspi.c
@@ -151,6 +151,7 @@ struct atmel_qspi {
const struct atmel_qspi_caps *caps;
u32 pending;
u32 mr;
+ u32 scr;
struct completion cmd_completion;
};
@@ -382,7 +383,7 @@ static int atmel_qspi_setup(struct spi_device *spi)
struct spi_controller *ctrl = spi->master;
struct atmel_qspi *aq = spi_controller_get_devdata(ctrl);
unsigned long src_rate;
- u32 scr, scbr;
+ u32 scbr;
if (ctrl->busy)
return -EBUSY;
@@ -399,8 +400,8 @@ static int atmel_qspi_setup(struct spi_device *spi)
if (scbr > 0)
scbr--;
- scr = QSPI_SCR_SCBR(scbr);
- writel_relaxed(scr, aq->regs + QSPI_SCR);
+ aq->scr = QSPI_SCR_SCBR(scbr);
+ writel_relaxed(aq->scr, aq->regs + QSPI_SCR);
return 0;
}
@@ -584,6 +585,9 @@ static int __maybe_unused atmel_qspi_resume(struct device *dev)
clk_prepare_enable(aq->qspick);
atmel_qspi_init(aq);
+
+ writel_relaxed(aq->scr, aq->regs + QSPI_SCR);
+
return 0;
}