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authorMithlesh Thukral <mithlesh@linsyssoft.com>2009-06-08 21:04:41 +0530
committerGreg Kroah-Hartman <gregkh@suse.de>2009-09-15 12:01:33 -0700
commit0a85b6f0ab0d2edb0d41b32697111ce0e4f43496 (patch)
tree4a3d939afc8473f6eaa3c462da60e71b8e0ba879 /drivers/staging/comedi/drivers/s626.h
parentdf6785681be9f05435f4299b921c41397ea061a1 (diff)
Staging: Comedi: Lindent changes to comdi driver in staging tree
Lindent changes to comdi driver in staging tree. This patch is followed by the checkpatch.pl error fixes. Did not make them part of this patch as the patch size is already huge. Signed-off-by: Mithlesh Thukral <mithlesh@linsyssoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/comedi/drivers/s626.h')
-rw-r--r--drivers/staging/comedi/drivers/s626.h16
1 files changed, 7 insertions, 9 deletions
diff --git a/drivers/staging/comedi/drivers/s626.h b/drivers/staging/comedi/drivers/s626.h
index 27ae02be5300..1d04922ea16c 100644
--- a/drivers/staging/comedi/drivers/s626.h
+++ b/drivers/staging/comedi/drivers/s626.h
@@ -134,17 +134,17 @@
#define DAC_WDMABUF_OS ADC_DMABUF_DWORDS
/* Interrupt enab bit in ISR and IER. */
-#define IRQ_GPIO3 0x00000040 /* IRQ enable for GPIO3. */
+#define IRQ_GPIO3 0x00000040 /* IRQ enable for GPIO3. */
#define IRQ_RPS1 0x10000000
#define ISR_AFOU 0x00000800
/* Audio fifo under/overflow detected. */
-#define IRQ_COINT1A 0x0400 /* conter 1A overflow interrupt mask */
-#define IRQ_COINT1B 0x0800 /* conter 1B overflow interrupt mask */
-#define IRQ_COINT2A 0x1000 /* conter 2A overflow interrupt mask */
-#define IRQ_COINT2B 0x2000 /* conter 2B overflow interrupt mask */
-#define IRQ_COINT3A 0x4000 /* conter 3A overflow interrupt mask */
-#define IRQ_COINT3B 0x8000 /* conter 3B overflow interrupt mask */
+#define IRQ_COINT1A 0x0400 /* conter 1A overflow interrupt mask */
+#define IRQ_COINT1B 0x0800 /* conter 1B overflow interrupt mask */
+#define IRQ_COINT2A 0x1000 /* conter 2A overflow interrupt mask */
+#define IRQ_COINT2B 0x2000 /* conter 2B overflow interrupt mask */
+#define IRQ_COINT3A 0x4000 /* conter 3A overflow interrupt mask */
+#define IRQ_COINT3B 0x8000 /* conter 3B overflow interrupt mask */
/* RPS command codes. */
#define RPS_CLRSIGNAL 0x00000000 /* CLEAR SIGNAL */
@@ -438,7 +438,6 @@
/* tri-state. */
#define EOS 0x00000001 /* End of superframe. */
-
/* I2C configuration constants. */
#define I2C_CLKSEL 0x0400
/* I2C bit rate = PCIclk/480 = 68.75 KHz. */
@@ -729,7 +728,6 @@
#define STDMSK_CLKMULT ((uint16_t)(3 << STDBIT_CLKMULT))
#define STDMSK_CLKENAB ((uint16_t)(1 << STDBIT_CLKENAB))
-
/* typedef struct indexCounter */
/* { */
/* unsigned int ao; */