diff options
author | H Hartley Sweeten <hsweeten@visionengravers.com> | 2014-06-20 13:28:49 -0700 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-06-26 20:11:17 -0400 |
commit | 2ffe88f67fbef05b337ba53ae05c0b37a9a376bf (patch) | |
tree | 94020f75b62557f672165bfecf1bc808b4d022ef /drivers/staging/comedi/drivers/s626.h | |
parent | de151452999fe48a67f9073f8903567bfc6d3ef3 (diff) |
staging: comedi: s626: define S626_LP_CNTR* registers based on channel number
Redefining the Counter Preload/Latch registers as a macro that calculates
the register offset based on the comedi channel number.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/comedi/drivers/s626.h')
-rw-r--r-- | drivers/staging/comedi/drivers/s626.h | 16 |
1 files changed, 3 insertions, 13 deletions
diff --git a/drivers/staging/comedi/drivers/s626.h b/drivers/staging/comedi/drivers/s626.h index 70557a00f88a..b83424e7507b 100644 --- a/drivers/staging/comedi/drivers/s626.h +++ b/drivers/staging/comedi/drivers/s626.h @@ -233,19 +233,9 @@ #define S626_LP_CRA(x) (0x0000 + (((x) % 3) * 0x4)) #define S626_LP_CRB(x) (0x0002 + (((x) % 3) * 0x4)) -/* Counter PreLoad (write) and Latch (read) Registers: */ -#define S626_LP_CNTR0ALSW 0x000C /* 0A lsw. */ -#define S626_LP_CNTR0AMSW 0x000E /* 0A msw. */ -#define S626_LP_CNTR0BLSW 0x0010 /* 0B lsw. */ -#define S626_LP_CNTR0BMSW 0x0012 /* 0B msw. */ -#define S626_LP_CNTR1ALSW 0x0014 /* 1A lsw. */ -#define S626_LP_CNTR1AMSW 0x0016 /* 1A msw. */ -#define S626_LP_CNTR1BLSW 0x0018 /* 1B lsw. */ -#define S626_LP_CNTR1BMSW 0x001A /* 1B msw. */ -#define S626_LP_CNTR2ALSW 0x001C /* 2A lsw. */ -#define S626_LP_CNTR2AMSW 0x001E /* 2A msw. */ -#define S626_LP_CNTR2BLSW 0x0020 /* 2B lsw. */ -#define S626_LP_CNTR2BMSW 0x0022 /* 2B msw. */ +/* Counter PreLoad (write) and Latch (read) Registers: 0A 1A 2A 0B 1B 2B */ +#define S626_LP_CNTR(x) (0x000c + (((x) < 3) ? 0x0 : 0x4) + \ + (((x) % 3) * 0x8)) /* Miscellaneous Registers (read/write): */ #define S626_LP_MISC1 0x0088 /* Read/write Misc1. */ |