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authorShanker Donthineni <shankerd@codeaurora.org>2022-04-28 14:38:58 +0530
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-05-05 22:45:57 +0200
commit4419da5d5d4b1788568b7bf22c083ba2832891df (patch)
treee0efd555a6b2474223c770f37b317d32e6c1de60 /drivers/tty/hvc/Kconfig
parent6808b7f5c8255d07d79cb8eac40047f59e4154ad (diff)
tty: hvc: dcc: Bind driver to CPU core0 for reads and writes
Some external debuggers do not handle reads/writes from/to DCC on secondary cores. Each core has its own DCC device registers, so when a core reads or writes from/to DCC, it only accesses its own DCC device. Since kernel code can run on any core, every time the kernel wants to write to the console, it might write to a different DCC. In SMP mode, external debugger creates multiple windows, and each window shows the DCC output only from that core's DCC. The result is that console output is either lost or scattered across windows. Selecting this debug option will enable code that serializes all console input and output to core 0. The DCC driver will create input and output FIFOs that all cores will use. Reads and writes from/to DCC are handled by a workqueue that runs only core 0. This is a debug feature to be used only in early stage development where debug serial console support would not be present. It disables PM feature like CPU hotplug and is not suitable for production environment. Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> Acked-by: Adam Wallis <awallis@codeaurora.org> Signed-off-by: Timur Tabi <timur@codeaurora.org> Signed-off-by: Elliot Berman <eberman@codeaurora.org> Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Link: https://lore.kernel.org/r/20220428090858.14489-1-quic_saipraka@quicinc.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/hvc/Kconfig')
-rw-r--r--drivers/tty/hvc/Kconfig19
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
index 8d60e0ff67b4..4f9264d005c0 100644
--- a/drivers/tty/hvc/Kconfig
+++ b/drivers/tty/hvc/Kconfig
@@ -87,6 +87,25 @@ config HVC_DCC
driver. This console is used through a JTAG only on ARM. If you don't have
a JTAG then you probably don't want this option.
+config HVC_DCC_SERIALIZE_SMP
+ bool "Use DCC only on CPU core 0"
+ depends on SMP && HVC_DCC
+ help
+ This is a DEBUG option to serialize all console input and output to CPU 0.
+ Some external debuggers, do not handle reads/writes from/to DCC on more
+ than one CPU core. Each core has its own DCC device registers, so when a
+ CPU core reads or writes from/to DCC, it only accesses its own DCC device.
+ Since kernel code can run on any CPU core, every time the kernel wants to
+ write to the console, it might write to a different DCC.
+
+ In SMP mode, external debuggers create multiple windows, and each window
+ shows the DCC output only from that core's DCC. The result is that
+ console output is either lost or scattered across windows.
+
+ Enable this option only if you are sure that you do not need features like
+ CPU hotplug to work. For example, during early chipset bringups without
+ debug serial console support. If unsure, say N.
+
config HVC_RISCV_SBI
bool "RISC-V SBI console support"
depends on RISCV_SBI_V01