diff options
| author | Gregory Herrero <gregory.herrero@intel.com> | 2015-04-29 22:09:19 +0200 |
|---|---|---|
| committer | Felipe Balbi <balbi@ti.com> | 2015-04-29 15:20:17 -0500 |
| commit | 285046aa11ad85a4de24891f5458d45f50d1bcc5 (patch) | |
| tree | d82ee50aa226cd772ea2850a7ed7de5cb8710fe7 /drivers/usb/dwc2/core.c | |
| parent | 2d1165a4b95e25aed83fed737d53ab0c87b831e6 (diff) | |
usb: dwc2: add hibernation core parameter
dwc2 may not be able to exit from hibernation if the hardware
does not provide a way to detect resume signalling in this state.
Thus, add the possibility to disable hibernation feature.
Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Gregory Herrero <gregory.herrero@intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/dwc2/core.c')
| -rw-r--r-- | drivers/usb/dwc2/core.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c index 7f461e3bc7a1..e5b546f1152e 100644 --- a/drivers/usb/dwc2/core.c +++ b/drivers/usb/dwc2/core.c @@ -342,6 +342,9 @@ int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, bool restore) u32 pcgcctl; int ret = 0; + if (!hsotg->core_params->hibernation) + return -ENOTSUPP; + pcgcctl = readl(hsotg->regs + PCGCTL); pcgcctl &= ~PCGCTL_STOPPCLK; writel(pcgcctl, hsotg->regs + PCGCTL); @@ -392,6 +395,9 @@ int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg) u32 pcgcctl; int ret = 0; + if (!hsotg->core_params->hibernation) + return -ENOTSUPP; + /* Backup all registers */ ret = dwc2_backup_global_registers(hsotg); if (ret) { @@ -2998,6 +3004,23 @@ static void dwc2_set_param_external_id_pin_ctl(struct dwc2_hsotg *hsotg, hsotg->core_params->external_id_pin_ctl = val; } +static void dwc2_set_param_hibernation(struct dwc2_hsotg *hsotg, + int val) +{ + if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) { + if (val >= 0) { + dev_err(hsotg->dev, + "'%d' invalid for parameter hibernation\n", + val); + dev_err(hsotg->dev, "hibernation must be 0 or 1\n"); + } + val = 0; + dev_dbg(hsotg->dev, "Setting hibernation to %d\n", val); + } + + hsotg->core_params->hibernation = val; +} + /* * This function is called during module intialization to pass module parameters * for the DWC_otg core. @@ -3043,6 +3066,7 @@ void dwc2_set_parameters(struct dwc2_hsotg *hsotg, dwc2_set_param_otg_ver(hsotg, params->otg_ver); dwc2_set_param_uframe_sched(hsotg, params->uframe_sched); dwc2_set_param_external_id_pin_ctl(hsotg, params->external_id_pin_ctl); + dwc2_set_param_hibernation(hsotg, params->hibernation); } /** |