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authorBruno Herrera <bruherrera@gmail.com>2017-01-31 23:25:43 -0200
committerFelipe Balbi <felipe.balbi@linux.intel.com>2017-04-11 10:58:17 +0300
commite35b135055e24d705736fd98c975afc46a793a09 (patch)
treea4e794cbf70cb330f4214659de128e511ed1e1ca /drivers/usb/dwc2/hcd.c
parentf87599a0d7777242273b44e45f741a0c61292771 (diff)
usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)
This patch introduces a new parameter to activate USB OTG HS/FS core embedded phy transceiver. The STM32F4x9 SoC uses the GGPIO register to enable the transceiver. Also add the dwc2_set_params function for stm32f4 otg fs. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Bruno Herrera <bruherrera@gmail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb/dwc2/hcd.c')
-rw-r--r--drivers/usb/dwc2/hcd.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 91ed5b61a6d9..740c7e86d31b 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -121,7 +121,7 @@ static void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg *hsotg)
static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
{
- u32 usbcfg, i2cctl;
+ u32 usbcfg, ggpio, i2cctl;
int retval = 0;
/*
@@ -145,6 +145,19 @@ static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
return retval;
}
}
+
+ if (hsotg->params.activate_stm_fs_transceiver) {
+ ggpio = dwc2_readl(hsotg->regs + GGPIO);
+ if (!(ggpio & GGPIO_STM32_OTG_GCCFG_PWRDWN)) {
+ dev_dbg(hsotg->dev, "Activating transceiver\n");
+ /*
+ * STM32F4x9 uses the GGPIO register as general
+ * core configuration register.
+ */
+ ggpio |= GGPIO_STM32_OTG_GCCFG_PWRDWN;
+ dwc2_writel(ggpio, hsotg->regs + GGPIO);
+ }
+ }
}
/*