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authorAlex Deucher <alexander.deucher@amd.com>2020-01-25 11:51:41 -0500
committerAlex Deucher <alexander.deucher@amd.com>2020-02-04 10:37:51 -0500
commit45826e9c4e9e952db43053f4fbed58ec602a410f (patch)
treecf498bf0cd418e7b39f58da26d6023ac352316c7 /drivers
parenta30a8c2f884c2835383cc5cce134fafbcaa62c1f (diff)
drm/amdgpu/navi: fix index for OD MCLK
You can only adjust the max mclk, not the min. Bug: https://gitlab.freedesktop.org/drm/amd/issues/1020 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.5.x
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/powerplay/navi10_ppt.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index e59cd2c74dc9..7c3629f64419 100644
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -845,7 +845,7 @@ static int navi10_print_clk_levels(struct smu_context *smu,
if (!navi10_od_feature_is_supported(od_settings, SMU_11_0_ODFEATURE_UCLK_MAX))
break;
size += sprintf(buf + size, "OD_MCLK:\n");
- size += sprintf(buf + size, "0: %uMHz\n", od_table->UclkFmax);
+ size += sprintf(buf + size, "1: %uMHz\n", od_table->UclkFmax);
break;
case SMU_OD_VDDC_CURVE:
if (!smu->od_enabled || !od_table || !od_settings)