diff options
| author | Jani Nikula <jani.nikula@intel.com> | 2024-05-23 15:59:42 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2024-05-24 10:41:15 +0300 |
| commit | 491097568a55238017356dba341cf6726a35b6bc (patch) | |
| tree | 47a6153408deb6b9050b5e759c1920eddbd44f21 /drivers | |
| parent | 90fa6a4210b78b39091627f4bd10f28835c4c5c2 (diff) | |
drm/i915: pass dev_priv explicitly to PRIMSIZE
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PRIMSIZE register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b672f17b4c3d5ba7ac606798bb3799408c26f075.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/i915/display/i9xx_plane.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/i9xx_plane_regs.h | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c index 1cefcdd4f26a..82cb393a0a22 100644 --- a/drivers/gpu/drm/i915/display/i9xx_plane.c +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c @@ -476,7 +476,7 @@ static void i9xx_plane_update_arm(struct intel_plane *plane, intel_de_write_fw(dev_priv, PRIMPOS(dev_priv, i9xx_plane), PRIM_POS_Y(crtc_y) | PRIM_POS_X(crtc_x)); - intel_de_write_fw(dev_priv, PRIMSIZE(i9xx_plane), + intel_de_write_fw(dev_priv, PRIMSIZE(dev_priv, i9xx_plane), PRIM_HEIGHT(crtc_h - 1) | PRIM_WIDTH(crtc_w - 1)); intel_de_write_fw(dev_priv, PRIMCNSTALPHA(i9xx_plane), 0); } diff --git a/drivers/gpu/drm/i915/display/i9xx_plane_regs.h b/drivers/gpu/drm/i915/display/i9xx_plane_regs.h index 7f291b34f10a..8d45c879e74a 100644 --- a/drivers/gpu/drm/i915/display/i9xx_plane_regs.h +++ b/drivers/gpu/drm/i915/display/i9xx_plane_regs.h @@ -94,8 +94,8 @@ #define PRIM_POS_X_MASK REG_GENMASK(15, 0) #define PRIM_POS_X(x) REG_FIELD_PREP(PRIM_POS_X_MASK, (x)) -#define _PRIMSIZE_A 0x60a0c -#define PRIMSIZE(plane) _MMIO_TRANS2(dev_priv, plane, _PRIMSIZE_A) +#define _PRIMSIZE_A 0x60a0c +#define PRIMSIZE(dev_priv, plane) _MMIO_TRANS2(dev_priv, plane, _PRIMSIZE_A) #define PRIM_HEIGHT_MASK REG_GENMASK(31, 16) #define PRIM_HEIGHT(h) REG_FIELD_PREP(PRIM_HEIGHT_MASK, (h)) #define PRIM_WIDTH_MASK REG_GENMASK(15, 0) |