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authorTony Luck <tony.luck@intel.com>2005-11-03 09:09:08 -0800
committerTony Luck <tony.luck@intel.com>2005-11-03 09:09:08 -0800
commit55725495f2175d0be2a5ed4135c2ea298b470001 (patch)
tree6005d0c7a95d994bf7ec8e6410dbd5a573e86fdf /include/asm-m68knommu/system.h
parent067794a1170ef61e295aea1719cf4a1ce20200f8 (diff)
parent06024f217d607369f0ee0071034ebb03071d5fb2 (diff)
Auto-update from upstream
Diffstat (limited to 'include/asm-m68knommu/system.h')
-rw-r--r--include/asm-m68knommu/system.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/include/asm-m68knommu/system.h b/include/asm-m68knommu/system.h
index 53cbbad0f130..6338afc850ba 100644
--- a/include/asm-m68knommu/system.h
+++ b/include/asm-m68knommu/system.h
@@ -312,6 +312,19 @@ cmpxchg(volatile int *p, int old, int new)
moveb #0x80, (%a0); \
"); \
})
+#elif defined(CONFIG_M520x)
+ /*
+ * The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register
+ * RCR), that when set, resets the MCF5208.
+ */
+#define HARD_RESET_NOW() \
+({ \
+ unsigned char volatile *reset; \
+ asm("move.w #0x2700, %sr"); \
+ reset = ((volatile unsigned short *)(MCF_IPSBAR + 0xA0000)); \
+ while(1) \
+ *reset |= 0x80; \
+})
#else
#define HARD_RESET_NOW() ({ \
asm(" \