Merge tag 'soc-dt-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
 "There is new support for additional on-chip devices on Apple,
  Mediatek, Renesas, Rockchip, Samsung, Google, TI, ST, Nvidia and
  Amlogic devices.

  The Arm Morello reference platform gets a devicetree for booting in
  normal aarch64 mode. The hardware supports experimental CHERI support,
  which requires a modified kernel.

  The AMD (formerly Xilinx) Versal NET SoC gets added, this is a
  combined FPGA with Cortex-A78 CPUs in a SoC.

  Six new ST STM32MP2 SoC variants are added. Like the earlier
  STM32MP25, the MP211, MP213, MP215, MP231, MP233 and MP235 models are
  based on one or two Cortex-A35 cores but each feature a different set
  of I/O devices.

  Mediatek MT8370 is a minor variation of MT8390 with fewer CPU and GPU
  cores

  Apple T2 is the baseboard management controller on earlier Intel CPU
  based Macs, with 16 models now gaining initial support.

  All the above come with dts files for the reference boards. In
  addition, these boards are added for the SoCs that are already
  supported:

   - The Milk-V Jupiter board based on SpacemiT K1/M1

   - NetCube Systems Kumquat board based on the 32-bit Allwinner V3s SoC

   - Three boards based on 32-bit stm32mp1

   - 11 distinct board variants from Toradex and one from Variscite, all
     based on i.MX6

   - Google Pixel Pro 6 phone based on gs101 (Tensor)

   - Three additional variants of the i.MX8MP based "Skov" board

   - A second variant of the i.MX95 EVK board

   - Two boards based on Renesas SoCs

   - Four boards based the Rockchip RK35xx series, plus the RK3588 'MNT
     Reform 2' laptop"

* tag 'soc-dt-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (538 commits)
  arm64: dts: Add gpio_intc node for Amlogic A5 SoCs
  arm64: dts: Add gpio_intc node for Amlogic A4 SoCs
  arm64: dts: hi3660: Add property for fixing CPUIdle
  arm64: dts: rockchip: remove ethm0_clk0_25m_out from Sige5 gmac0
  arm64: dts: marvell: Use preferred node names for "simple-bus"
  arm64: dts: marvell: Drop unused CP11X_TYPE define
  arm64: dts: marvell: Move arch timer and pmu nodes to top-level
  arm64: dts: rockchip: Fix PWM pinctrl names
  arm64: dts: rockchip: fix RK3576 SCMI clock IDs
  dt-bindings: clock: rk3576: add SCMI clocks
  arm64: dts: rockchip: Fix pcie reset gpio on Orange Pi 5 Max
  arm64: dts: amd/seattle: Drop undocumented "spi-controller" properties
  arm64: dts: amd/seattle: Fix bus, mmc, and ethernet node names
  arm64: dts: amd/seattle: Move and simplify fixed clocks
  arm64: dts: amd/seattle: Base Overdrive B1 on top of B0 version
  arm64: dts: rockchip: Enable HDMI audio output for ArmSoM Sige7
  arm64: dts: rockchip: Enable onboard eMMC on Radxa E20C
  arm64: dts: rockchip: Add SDHCI controller for RK3528
  arm64: dts: rockchip: Remove bluetooth node from rock-3a
  arm64: dts: rockchip: Move rk356x scmi SHMEM to reserved memory
  ...

1 files changed, 21 insertions, 0 deletions

diff --git a/include/dt-bindings/clock/samsung,exynos990.h b/include/dt-bindings/clock/samsung,exynos990.h
index 307215a3f3ed..6b9df09d2822 100644
--- a/include/dt-bindings/clock/samsung,exynos990.h
+++ b/include/dt-bindings/clock/samsung,exynos990.h
@@ -233,4 +233,25 @@
 #define CLK_GOUT_HSI0_CMU_HSI0_PCLK			21
 #define CLK_GOUT_HSI0_XIU_D_HSI0_ACLK			22
 
+/* CMU_PERIS */
+#define CLK_MOUT_PERIS_BUS_USER			1
+#define CLK_MOUT_PERIS_CLK_PERIS_GIC		2
+#define CLK_GOUT_PERIS_SYSREG_PERIS_PCLK	3
+#define CLK_GOUT_PERIS_WDT_CLUSTER2_PCLK	4
+#define CLK_GOUT_PERIS_WDT_CLUSTER0_PCLK	5
+#define CLK_CLK_PERIS_PERIS_CMU_PERIS_PCLK	6
+#define CLK_GOUT_PERIS_CLK_PERIS_BUSP_CLK	7
+#define CLK_GOUT_PERIS_CLK_PERIS_OSCCLK_CLK	8
+#define CLK_GOUT_PERIS_CLK_PERIS_GIC_CLK	9
+#define CLK_GOUT_PERIS_AD_AXI_P_PERIS_ACLKM	10
+#define CLK_GOUT_PERIS_OTP_CON_BIRA_PCLK	11
+#define CLK_GOUT_PERIS_GIC_CLK			12
+#define CLK_GOUT_PERIS_LHM_AXI_P_PERIS_CLK	13
+#define CLK_GOUT_PERIS_MCT_PCLK			14
+#define CLK_GOUT_PERIS_OTP_CON_TOP_PCLK		15
+#define CLK_GOUT_PERIS_D_TZPC_PERIS_PCLK	16
+#define CLK_GOUT_PERIS_TMU_TOP_PCLK		17
+#define CLK_GOUT_PERIS_OTP_CON_BIRA_OSCCLK	18
+#define CLK_GOUT_PERIS_OTP_CON_TOP_OSCCLK	19
+
 #endif