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authorBoris Brezillon <bbrezillon@kernel.org>2018-10-25 17:16:47 +0200
committerMiquel Raynal <miquel.raynal@bootlin.com>2019-04-08 10:21:14 +0200
commit298151689b33e04eaf09cf22e1d42396f7723690 (patch)
tree1a30b29c1632e6951cf804f4572689630fee03eb /include/linux/mtd
parent7beb37e5f0d29d7d23aec0e47900ff4dfa8c2e55 (diff)
mtd: rawnand: Get rid of chip->bits_per_cell
Now that we inherit from nand_device, we can use nand_device->memorg.bits_per_cell instead of having our own field at the nand_chip level. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Diffstat (limited to 'include/linux/mtd')
-rw-r--r--include/linux/mtd/rawnand.h6
1 files changed, 2 insertions, 4 deletions
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 9d0cdae4e204..b2570adab911 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -992,7 +992,6 @@ struct nand_legacy {
* @badblockbits: [INTERN] minimum number of set bits in a good block's
* bad block marker position; i.e., BBM == 11110111b is
* not bad when badblockbits == 7
- * @bits_per_cell: [INTERN] number of bits per cell. i.e., 1 means SLC.
* @ecc_strength_ds: [INTERN] ECC correctability from the datasheet.
* Minimum amount of bit errors per @ecc_step_ds guaranteed
* to be correctable. If unknown, set to zero.
@@ -1064,7 +1063,6 @@ struct nand_chip {
} pagecache;
int subpagesize;
- uint8_t bits_per_cell;
uint16_t ecc_strength_ds;
uint16_t ecc_step_ds;
int onfi_timing_mode_default;
@@ -1236,9 +1234,9 @@ int nand_create_bbt(struct nand_chip *chip);
*/
static inline bool nand_is_slc(struct nand_chip *chip)
{
- WARN(chip->bits_per_cell == 0,
+ WARN(nanddev_bits_per_cell(&chip->base) == 0,
"chip->bits_per_cell is used uninitialized\n");
- return chip->bits_per_cell == 1;
+ return nanddev_bits_per_cell(&chip->base) == 1;
}
/**