diff options
| author | Jan Petrous (OSS) <jan.petrous@oss.nxp.com> | 2024-12-05 17:42:59 +0100 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2024-12-09 18:36:02 -0800 |
| commit | c8fab05d021dfc04401102f9fa1de07fc8f75d8d (patch) | |
| tree | aa7e7c6fd4c5570d98cc724723075a23c46a6ae2 /include/linux/stmmac.h | |
| parent | 31cdd8418234e70043abd26894b57eb201489cba (diff) | |
net: stmmac: Extend CSR calc support
Add support for CSR clock range up to 800 MHz.
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com>
Link: https://patch.msgid.link/20241205-upstream_s32cc_gmac-v8-2-ec1d180df815@oss.nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'include/linux/stmmac.h')
| -rw-r--r-- | include/linux/stmmac.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index 75cbfb576358..865d0fe26f98 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -34,6 +34,8 @@ #define STMMAC_CSR_35_60M 0x3 /* MDC = clk_scr_i/26 */ #define STMMAC_CSR_150_250M 0x4 /* MDC = clk_scr_i/102 */ #define STMMAC_CSR_250_300M 0x5 /* MDC = clk_scr_i/124 */ +#define STMMAC_CSR_300_500M 0x6 /* MDC = clk_scr_i/204 */ +#define STMMAC_CSR_500_800M 0x7 /* MDC = clk_scr_i/324 */ /* MTL algorithms identifiers */ #define MTL_TX_ALGORITHM_WRR 0x0 |