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authorLinus Torvalds <torvalds@linux-foundation.org>2025-01-24 14:56:59 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2025-01-24 14:56:59 -0800
commitf2ad904e923f70a80f478febf001f88dfd65a64c (patch)
tree3f54b7556b9fc5fb5d07525186e4bd216c58b55d /include/linux
parentf10203927097ff9e5a251f170038fefa38e274b7 (diff)
parent9ec80025030b0492512e01e2e667f4111c583b46 (diff)
Merge tag 'soc-drivers-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann: "These are changes to SoC specific drivers and DT bindings that don't have a separate subsystem tree, or that get grouped here for simplicity. Nothing out of the ordinary for the 6.14 release here: - Most of the updates are for Qualcomm specific drivers, adding support for additional SoCs in the exssting drivers, and support for wrapped encryption key access in the SCM firmware. - The Arm SCMI firmware code gains support for having multiple instances of firmware running, and better module auto loading. - A few minor updates for litex, samsung, ti, tegra, mediatek, imx and renesas platforms. - Reset controller updates for amlogic, to add support for the A1 soc and clean up the existing code. - Memory controller updates for ti davinci aemif, refactoring the code and adding a few interfaces to other drivers" * tag 'soc-drivers-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (58 commits) drivers/soc/litex: Use devm_register_restart_handler() reset: amlogic: aux: drop aux registration helper reset: amlogic: aux: get regmap through parent device reset: amlogic: add support for A1 SoC in auxiliary reset driver dt-bindings: reset: add bindings for A1 SoC audio reset controller soc/tegra: fuse: Update Tegra234 nvmem keepout list soc/tegra: Fix spelling error in tegra234_lookup_slave_timeout() soc/tegra: cbb: Drop unnecessary debugfs error handling firmware: qcom: scm: add calls for wrapped key support soc: qcom: pd_mapper: Add SM7225 compatible dt-bindings: firmware: qcom,scm: Document ipq5424 SCM soc: qcom: llcc: Update configuration data for IPQ5424 dt-bindings: cache: qcom,llcc: Add IPQ5424 compatible soc: mediatek: mtk-devapc: Fix leaking IO map on driver remove soc: mediatek: mtk-devapc: Fix leaking IO map on error paths firmware: qcom: scm: smc: Narrow 'mempool' variable scope firmware: qcom: scm: smc: Handle missing SCM device firmware: qcom: scm: Cleanup global '__scm' on probe failures firmware: qcom: scm: Fix missing read barrier in qcom_scm_get_tzmem_pool() firmware: qcom: scm: Fix missing read barrier in qcom_scm_is_available() ...
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/firmware/qcom/qcom_scm.h8
-rw-r--r--include/linux/memory/ti-aemif.h32
-rw-r--r--include/linux/omap-gpmc.h4
-rw-r--r--include/linux/scmi_imx_protocol.h9
4 files changed, 45 insertions, 8 deletions
diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h
index 4621aec0328c..983e1591bbba 100644
--- a/include/linux/firmware/qcom/qcom_scm.h
+++ b/include/linux/firmware/qcom/qcom_scm.h
@@ -105,6 +105,14 @@ bool qcom_scm_ice_available(void);
int qcom_scm_ice_invalidate_key(u32 index);
int qcom_scm_ice_set_key(u32 index, const u8 *key, u32 key_size,
enum qcom_scm_ice_cipher cipher, u32 data_unit_size);
+bool qcom_scm_has_wrapped_key_support(void);
+int qcom_scm_derive_sw_secret(const u8 *eph_key, size_t eph_key_size,
+ u8 *sw_secret, size_t sw_secret_size);
+int qcom_scm_generate_ice_key(u8 *lt_key, size_t lt_key_size);
+int qcom_scm_prepare_ice_key(const u8 *lt_key, size_t lt_key_size,
+ u8 *eph_key, size_t eph_key_size);
+int qcom_scm_import_ice_key(const u8 *raw_key, size_t raw_key_size,
+ u8 *lt_key, size_t lt_key_size);
bool qcom_scm_hdcp_available(void);
int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp);
diff --git a/include/linux/memory/ti-aemif.h b/include/linux/memory/ti-aemif.h
new file mode 100644
index 000000000000..da94a9d985e7
--- /dev/null
+++ b/include/linux/memory/ti-aemif.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __MEMORY_TI_AEMIF_H
+#define __MEMORY_TI_AEMIF_H
+
+/**
+ * struct aemif_cs_timings: structure to hold CS timing configuration
+ * values are expressed in number of clock cycles - 1
+ * @ta: minimum turn around time
+ * @rhold: read hold width
+ * @rstrobe: read strobe width
+ * @rsetup: read setup width
+ * @whold: write hold width
+ * @wstrobe: write strobe width
+ * @wsetup: write setup width
+ */
+struct aemif_cs_timings {
+ u32 ta;
+ u32 rhold;
+ u32 rstrobe;
+ u32 rsetup;
+ u32 whold;
+ u32 wstrobe;
+ u32 wsetup;
+};
+
+struct aemif_device;
+
+int aemif_set_cs_timings(struct aemif_device *aemif, u8 cs, struct aemif_cs_timings *timings);
+int aemif_check_cs_timings(struct aemif_cs_timings *timings);
+
+#endif // __MEMORY_TI_AEMIF_H
diff --git a/include/linux/omap-gpmc.h b/include/linux/omap-gpmc.h
index c9e3843d2dd5..263b915df1fb 100644
--- a/include/linux/omap-gpmc.h
+++ b/include/linux/omap-gpmc.h
@@ -66,10 +66,6 @@ extern int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
struct device_node;
-extern int gpmc_get_client_irq(unsigned irq_config);
-
-extern unsigned int gpmc_ticks_to_ns(unsigned int ticks);
-
extern void gpmc_cs_write_reg(int cs, int idx, u32 val);
extern int gpmc_calc_divider(unsigned int sync_clk);
extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t,
diff --git a/include/linux/scmi_imx_protocol.h b/include/linux/scmi_imx_protocol.h
index 066216f1357a..53b356a26414 100644
--- a/include/linux/scmi_imx_protocol.h
+++ b/include/linux/scmi_imx_protocol.h
@@ -13,10 +13,11 @@
#include <linux/notifier.h>
#include <linux/types.h>
-enum scmi_nxp_protocol {
- SCMI_PROTOCOL_IMX_BBM = 0x81,
- SCMI_PROTOCOL_IMX_MISC = 0x84,
-};
+#define SCMI_PROTOCOL_IMX_BBM 0x81
+#define SCMI_PROTOCOL_IMX_MISC 0x84
+
+#define SCMI_IMX_VENDOR "NXP"
+#define SCMI_IMX_SUBVENDOR "IMX"
struct scmi_imx_bbm_proto_ops {
int (*rtc_time_set)(const struct scmi_protocol_handle *ph, u32 id,