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authorMiquel Raynal <miquel.raynal@bootlin.com>2025-01-24 10:52:35 +0100
committerMiquel Raynal <miquel.raynal@bootlin.com>2025-01-24 10:52:35 +0100
commit0ddeb4fe9d3b501c2c6a3522325d88ee166e02ea (patch)
treec7eb9bcfdd32baf6ef11e330c0f72807e3c0116d /scripts/include
parentb44574c7da71e03792de51daf4d5fa5435a64a54 (diff)
parent98b34d52004b5a35db1c1b2c2133f52d67bede0f (diff)
Merge tag 'nand/for-6.14' into mtd/next
* Raw NAND changes A new controller driver, from Nuvoton, has been merged. Bastien Curutchet has contributed a series improving the Davinci controller driver, both on the organization of the code, but also on the performance side. The binding has also been converted to yaml, received a new OOB layout and now supports on-die ECC engines. The Qualcomm controller driver has been deeply cleaned to extract some parts of the code into a shared file with the Qualcomm SPI memory controller. Aside from these main changes, the Cadence binding has been converted to yaml, the brcmnand controller driver has received a small fix, otherwise some more minor changes have also made their way in. * SPI NAND changes The SPI NAND subsystem has seen a great improvement, with the advent of DTR operations (DDR operations, which may be extended to the address cycles). The first vendor driver to benefit from these improvements is the Winbond driver. A new manufacturer driver is added SkyHigh, with a new constraint for the core, it is impossible to disable the on-die ECC engine. A Foresee device is also now supported.
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