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authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2023-02-09 12:28:05 +0000
committerMark Brown <broonie@kernel.org>2023-02-09 14:03:32 +0000
commitddffe3b82849ba2774d7a06fbe1cc7e83378c4d2 (patch)
treeb24c88c2f898ae017be0dd07ae9465a48f402e9c /sound/soc/codecs/lpass-va-macro.c
parente7621434378c40b62ef858c14ae6415fb6469a8e (diff)
ASoC: codecs: lpass: do not reset soundwire block on clk enable
resetting soundwire block will put the slaves out of sync and result in re-enumeration during fsgen disable/enable path this is totally unnecessary and resulting fifo overflows. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20230209122806.18923-8-srinivas.kandagatla@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/lpass-va-macro.c')
-rw-r--r--sound/soc/codecs/lpass-va-macro.c23
1 files changed, 12 insertions, 11 deletions
diff --git a/sound/soc/codecs/lpass-va-macro.c b/sound/soc/codecs/lpass-va-macro.c
index 1623ba78ddb3..fd62817d29a0 100644
--- a/sound/soc/codecs/lpass-va-macro.c
+++ b/sound/soc/codecs/lpass-va-macro.c
@@ -1333,17 +1333,9 @@ static int fsgen_gate_enable(struct clk_hw *hw)
int ret;
ret = va_macro_mclk_enable(va, true);
- if (!va->has_swr_master)
- return ret;
-
- regmap_update_bits(regmap, CDC_VA_CLK_RST_CTRL_SWR_CONTROL,
- CDC_VA_SWR_RESET_MASK, CDC_VA_SWR_RESET_ENABLE);
-
- regmap_update_bits(regmap, CDC_VA_CLK_RST_CTRL_SWR_CONTROL,
- CDC_VA_SWR_CLK_EN_MASK,
- CDC_VA_SWR_CLK_ENABLE);
- regmap_update_bits(regmap, CDC_VA_CLK_RST_CTRL_SWR_CONTROL,
- CDC_VA_SWR_RESET_MASK, 0x0);
+ if (va->has_swr_master)
+ regmap_update_bits(regmap, CDC_VA_CLK_RST_CTRL_SWR_CONTROL,
+ CDC_VA_SWR_CLK_EN_MASK, CDC_VA_SWR_CLK_ENABLE);
return ret;
}
@@ -1538,6 +1530,15 @@ static int va_macro_probe(struct platform_device *pdev)
}
+ if (va->has_swr_master) {
+ regmap_update_bits(va->regmap, CDC_VA_CLK_RST_CTRL_SWR_CONTROL,
+ CDC_VA_SWR_RESET_MASK, CDC_VA_SWR_RESET_ENABLE);
+ regmap_update_bits(va->regmap, CDC_VA_CLK_RST_CTRL_SWR_CONTROL,
+ CDC_VA_SWR_CLK_EN_MASK, CDC_VA_SWR_CLK_ENABLE);
+ regmap_update_bits(va->regmap, CDC_VA_CLK_RST_CTRL_SWR_CONTROL,
+ CDC_VA_SWR_RESET_MASK, 0x0);
+ }
+
ret = devm_snd_soc_register_component(dev, &va_macro_component_drv,
va_macro_dais,
ARRAY_SIZE(va_macro_dais));